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Re: [Qemu-devel] [RFC PATCH 09/10] i386: move TCG functions out of helpe
From: |
Blue Swirl |
Subject: |
Re: [Qemu-devel] [RFC PATCH 09/10] i386: move TCG functions out of helper.o, non-TCG functions to cpu.o |
Date: |
Mon, 17 Sep 2012 19:15:12 +0000 |
On Mon, Sep 17, 2012 at 4:00 PM, Paolo Bonzini <address@hidden> wrote:
> This lets non-TCG build remove *_helper.c from the build.
>
> Signed-off-by: Paolo Bonzini <address@hidden>
> ---
> target-i386/cpu.c | 18 ++++++++++++++++++
> target-i386/excp_helper.c | 24 ++++++++++++++++++++++++
> target-i386/fpu_helper.c | 18 ------------------
> target-i386/helper.c | 24 ------------------------
> 4 file modificati, 42 inserzioni(+), 42 rimozioni(-)
>
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> index 423e009..e0f0b57 100644
> --- a/target-i386/cpu.c
> +++ b/target-i386/cpu.c
> @@ -1831,6 +1831,24 @@ static void x86_cpu_common_class_init(ObjectClass *oc,
> void *data)
> cc->reset = x86_cpu_reset;
> }
>
> +void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, floatx80 f)
> +{
> + CPU_LDoubleU temp;
> +
> + temp.d = f;
> + *pmant = temp.l.lower;
> + *pexp = temp.l.upper;
> +}
> +
> +floatx80 cpu_set_fp80(uint64_t mant, uint16_t upper)
> +{
> + CPU_LDoubleU temp;
> +
> + temp.l.upper = upper;
> + temp.l.lower = mant;
> + return temp.d;
> +}
> +
> static const TypeInfo x86_cpu_type_info = {
> .name = TYPE_X86_CPU,
> .parent = TYPE_CPU,
> diff --git a/target-i386/excp_helper.c b/target-i386/excp_helper.c
> index aaa5ca2..391f115 100644
> --- a/target-i386/excp_helper.c
> +++ b/target-i386/excp_helper.c
> @@ -40,6 +40,30 @@ void helper_raise_exception(CPUX86State *env, int
> exception_index)
> raise_exception(env, exception_index);
> }
>
> +void breakpoint_handler(CPUX86State *env)
> +{
> + CPUBreakpoint *bp;
> +
> + if (env->watchpoint_hit) {
> + if (env->watchpoint_hit->flags & BP_CPU) {
> + env->watchpoint_hit = NULL;
> + if (check_hw_breakpoints(env, 0))
Please fix coding style while moving.
> + raise_exception(env, EXCP01_DB);
> + else
> + cpu_resume_from_signal(env, NULL);
> + }
> + } else {
> + QTAILQ_FOREACH(bp, &env->breakpoints, entry)
> + if (bp->pc == env->eip) {
> + if (bp->flags & BP_CPU) {
> + check_hw_breakpoints(env, 1);
> + raise_exception(env, EXCP01_DB);
> + }
> + break;
> + }
> + }
> +}
The only user for this function is in cpu.c, so if moved there, this
function could be static. excp_helper.c does make sense too.
> +
> /*
> * Check nested exceptions and change to double or triple fault if
> * needed. It should only be called, if this is not an interrupt.
> diff --git a/target-i386/fpu_helper.c b/target-i386/fpu_helper.c
> index dfc34a6..7747236 100644
> --- a/target-i386/fpu_helper.c
> +++ b/target-i386/fpu_helper.c
> @@ -1198,24 +1198,6 @@ void helper_fxrstor(CPUX86State *env, target_ulong
> ptr, int data64)
> }
> }
>
> -void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, floatx80 f)
> -{
> - CPU_LDoubleU temp;
> -
> - temp.d = f;
> - *pmant = temp.l.lower;
> - *pexp = temp.l.upper;
> -}
> -
> -floatx80 cpu_set_fp80(uint64_t mant, uint16_t upper)
> -{
> - CPU_LDoubleU temp;
> -
> - temp.l.upper = upper;
> - temp.l.lower = mant;
> - return temp.d;
> -}
> -
> /* MMX/SSE */
> /* XXX: optimize by storing fptt and fptags in the static cpu state */
>
> diff --git a/target-i386/helper.c b/target-i386/helper.c
> index 8a5da3d..cfc7f1a 100644
> --- a/target-i386/helper.c
> +++ b/target-i386/helper.c
> @@ -941,30 +941,6 @@ int check_hw_breakpoints(CPUX86State *env, int
> force_dr6_update)
> return hit_enabled;
> }
>
> -void breakpoint_handler(CPUX86State *env)
> -{
> - CPUBreakpoint *bp;
> -
> - if (env->watchpoint_hit) {
> - if (env->watchpoint_hit->flags & BP_CPU) {
> - env->watchpoint_hit = NULL;
> - if (check_hw_breakpoints(env, 0))
> - raise_exception(env, EXCP01_DB);
> - else
> - cpu_resume_from_signal(env, NULL);
> - }
> - } else {
> - QTAILQ_FOREACH(bp, &env->breakpoints, entry)
> - if (bp->pc == env->eip) {
> - if (bp->flags & BP_CPU) {
> - check_hw_breakpoints(env, 1);
> - raise_exception(env, EXCP01_DB);
> - }
> - break;
> - }
> - }
> -}
> -
> typedef struct MCEInjectionParams {
> Monitor *mon;
> CPUX86State *env;
> --
> 1.7.12
>
>
>
- Re: [Qemu-devel] [RFC PATCH 01/10] configure: factor out list of supported Xen/KVM targets, (continued)
[Qemu-devel] [RFC PATCH 08/10] configure: add --disable-tcg configure option, Paolo Bonzini, 2012/09/17
[Qemu-devel] [RFC PATCH 05/10] exec: small adjustments for TCG separation, Paolo Bonzini, 2012/09/17
[Qemu-devel] [RFC PATCH 06/10] monitor: disable info jit if !TCG, Paolo Bonzini, 2012/09/17
[Qemu-devel] [RFC PATCH 09/10] i386: move TCG functions out of helper.o, non-TCG functions to cpu.o, Paolo Bonzini, 2012/09/17
[Qemu-devel] [RFC PATCH 07/10] configure: emit summary at the very end, Paolo Bonzini, 2012/09/17
[Qemu-devel] [RFC PATCH 03/10] vl: implement tcg_enabled() and tcg_available() as for other accelerators, Paolo Bonzini, 2012/09/17
[Qemu-devel] [RFC PATCH 10/10] build: do not build TCG files if TCG is disabled, Paolo Bonzini, 2012/09/17
[Qemu-devel] [RFC PATCH 04/10] tcg: change cpu_restore_state to return void, Paolo Bonzini, 2012/09/17
Re: [Qemu-devel] [RFC PATCH 00/10] Add --disable-tcg, Blue Swirl, 2012/09/17