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Re: [Qemu-devel] [PATCH] tcg-hppa: Implement movcond
From: |
Aurelien Jarno |
Subject: |
Re: [Qemu-devel] [PATCH] tcg-hppa: Implement movcond |
Date: |
Sat, 22 Sep 2012 12:01:08 +0200 |
User-agent: |
Mutt/1.5.20 (2009-06-14) |
On Fri, Sep 21, 2012 at 06:46:32PM -0700, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <address@hidden>
> ---
> tcg/hppa/tcg-target.c | 21 +++++++++++++++++++++
> tcg/hppa/tcg-target.h | 2 +-
> 2 files changed, 22 insertions(+), 1 deletion(-)
>
> diff --git a/tcg/hppa/tcg-target.c b/tcg/hppa/tcg-target.c
> index 5385d45..793b90d 100644
> --- a/tcg/hppa/tcg-target.c
> +++ b/tcg/hppa/tcg-target.c
> @@ -912,6 +912,18 @@ static void tcg_out_setcond2(TCGContext *s, int cond,
> TCGArg ret,
> tcg_out_mov(s, TCG_TYPE_I32, ret, scratch);
> }
>
> +static void tcg_out_movcond(TCGContext *s, int cond, TCGArg ret,
> + TCGArg c1, TCGArg c2, int c2const,
> + TCGArg v1, int v1const)
> +{
> + tcg_out_comclr(s, tcg_invert_cond(cond), TCG_REG_R0, c1, c2, c2const);
> + if (v1const) {
> + tcg_out_movi(s, TCG_TYPE_I32, ret, v1);
> + } else {
> + tcg_out_mov(s, TCG_TYPE_I32, ret, v1);
> + }
> +}
> +
> #if defined(CONFIG_SOFTMMU)
> #include "../../softmmu_defs.h"
>
> @@ -1520,6 +1532,11 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
> opc, const TCGArg *args,
> args[3], const_args[3], args[4], const_args[4]);
> break;
>
> + case INDEX_op_movcond_i32:
> + tcg_out_movcond(s, args[5], args[0], args[1], args[2], const_args[2],
> + args[3], const_args[3]);
> + break;
> +
> case INDEX_op_add2_i32:
> tcg_out_add2(s, args[0], args[1], args[2], args[3],
> args[4], args[5], const_args[4]);
> @@ -1628,6 +1645,10 @@ static const TCGTargetOpDef hppa_op_defs[] = {
> { INDEX_op_setcond_i32, { "r", "rZ", "rI" } },
> { INDEX_op_setcond2_i32, { "r", "rZ", "rZ", "rI", "rI" } },
>
> + /* ??? We can actually support a signed 14-bit arg3, but we
> + only have existing constraints for a signed 11-bit. */
> + { INDEX_op_movcond_i32, { "r", "rZ", "rI", "rI", "0" } },
> +
What's the problem in adding a constraint for that? The lack of
available letters? ;-)
> { INDEX_op_add2_i32, { "r", "r", "rZ", "rZ", "rI", "rZ" } },
> { INDEX_op_sub2_i32, { "r", "r", "rI", "rZ", "rK", "rZ" } },
>
> diff --git a/tcg/hppa/tcg-target.h b/tcg/hppa/tcg-target.h
> index 4defd28..5351353 100644
> --- a/tcg/hppa/tcg-target.h
> +++ b/tcg/hppa/tcg-target.h
> @@ -96,7 +96,7 @@ typedef enum {
> #define TCG_TARGET_HAS_nand_i32 0
> #define TCG_TARGET_HAS_nor_i32 0
> #define TCG_TARGET_HAS_deposit_i32 1
> -#define TCG_TARGET_HAS_movcond_i32 0
> +#define TCG_TARGET_HAS_movcond_i32 1
>
> /* optional instructions automatically implemented */
> #define TCG_TARGET_HAS_neg_i32 0 /* sub rd, 0, rs */
Otherwise looks fine to me.
Reviewed-by: Aurelien Jarno <address@hidden>
--
Aurelien Jarno GPG: 1024D/F1BCDB73
address@hidden http://www.aurel32.net