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Re: [Qemu-devel] [PATCH 2/2] tcg/arm: Implement movcond_i32
From: |
Paolo Bonzini |
Subject: |
Re: [Qemu-devel] [PATCH 2/2] tcg/arm: Implement movcond_i32 |
Date: |
Thu, 27 Sep 2012 08:33:10 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:15.0) Gecko/20120911 Thunderbird/15.0.1 |
Il 26/09/2012 20:48, Peter Maydell ha scritto:
> Implement movcond_i32 for ARM, as the sequence
> mov dst, v2 (implicitly done by the tcg common code)
> cmp c1, c2
> movCC dst, v1
Should you make tcg/optimize.c prefer "movcond a, a, b" to "movcond a,
b, a", similar to commit c2b0e2f (tcg/optimize: prefer the "op a, a, b"
form for commutative ops, 2012-09-19)?
Paolo
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> tcg/arm/tcg-target.c | 10 ++++++++++
> tcg/arm/tcg-target.h | 2 +-
> 2 files changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
> index a83b295..e38fd65 100644
> --- a/tcg/arm/tcg-target.c
> +++ b/tcg/arm/tcg-target.c
> @@ -1587,6 +1587,15 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
> opc,
> case INDEX_op_movi_i32:
> tcg_out_movi32(s, COND_AL, args[0], args[1]);
> break;
> + case INDEX_op_movcond_i32:
> + /* Constraints mean that v2 is always in the same register as dest,
> + * so we only need to do "if condition passed, move v1 to dest".
> + */
> + tcg_out_dat_rI(s, COND_AL, ARITH_CMP, 0,
> + args[1], args[2], const_args[2]);
> + tcg_out_dat_rI(s, tcg_cond_to_arm_cond[args[5]],
> + ARITH_MOV, args[0], 0, args[3], const_args[3]);
> + break;
> case INDEX_op_add_i32:
> c = ARITH_ADD;
> goto gen_arith;
> @@ -1798,6 +1807,7 @@ static const TCGTargetOpDef arm_op_defs[] = {
>
> { INDEX_op_brcond_i32, { "r", "rI" } },
> { INDEX_op_setcond_i32, { "r", "r", "rI" } },
> + { INDEX_op_movcond_i32, { "r", "r", "rI", "rI", "0" } },
>
> /* TODO: "r", "r", "r", "r", "ri", "ri" */
> { INDEX_op_add2_i32, { "r", "r", "r", "r", "r", "r" } },
> diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
> index e2299ca..0df3352 100644
> --- a/tcg/arm/tcg-target.h
> +++ b/tcg/arm/tcg-target.h
> @@ -73,7 +73,7 @@ typedef enum {
> #define TCG_TARGET_HAS_nand_i32 0
> #define TCG_TARGET_HAS_nor_i32 0
> #define TCG_TARGET_HAS_deposit_i32 0
> -#define TCG_TARGET_HAS_movcond_i32 0
> +#define TCG_TARGET_HAS_movcond_i32 1
>
> #define TCG_TARGET_HAS_GUEST_BASE
>
>