Re: [Qemu-devel] [PATCH 1/5] disas: avoid using cpu_single

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Re: [Qemu-devel] [PATCH 1/5] disas: avoid using cpu_single_env

From:	Aurelien Jarno
Subject:	Re: [Qemu-devel] [PATCH 1/5] disas: avoid using cpu_single_env
Date:	Mon, 29 Oct 2012 15:36:03 +0100
User-agent:	Mutt/1.5.21 (2010-09-15)
On Sun, Oct 28, 2012 at 03:03:48PM +0000, Blue Swirl wrote:
> Pass around CPUState instead of using global cpu_single_env.
> 
> Signed-off-by: Blue Swirl <address@hidden>
> ---
>  disas.c                       |  149 
> ++++++++++++++++++++++-------------------
>  disas.h                       |    3 +-
>  qemu-log.h                    |    6 +-
>  target-alpha/translate.c      |    2 +-
>  target-arm/translate.c        |    2 +-
>  target-cris/translate.c       |    2 +-
>  target-i386/translate.c       |    2 +-
>  target-lm32/translate.c       |    2 +-
>  target-m68k/translate.c       |    2 +-
>  target-microblaze/translate.c |    2 +-
>  target-mips/translate.c       |    2 +-
>  target-openrisc/translate.c   |    2 +-
>  target-ppc/translate.c        |    2 +-
>  target-s390x/translate.c      |    2 +-
>  target-sh4/translate.c        |    2 +-
>  target-sparc/translate.c      |    2 +-
>  target-unicore32/translate.c  |    2 +-
>  17 files changed, 100 insertions(+), 86 deletions(-)
> 
> diff --git a/disas.c b/disas.c
> index b801c8f..6da1dd0 100644
> --- a/disas.c
> +++ b/disas.c
> @@ -7,6 +7,11 @@
>  #include "cpu.h"
>  #include "disas.h"
>  
> +typedef struct CPUDebug {
> +    struct disassemble_info info;
> +    CPUArchState *env;
> +} CPUDebug;
> +
>  /* Filled in by elfload.c.  Simplistic, but will do for now. */
>  struct syminfo *syminfos = NULL;
>  
> @@ -32,7 +37,9 @@ target_read_memory (bfd_vma memaddr,
>                      int length,
>                      struct disassemble_info *info)
>  {
> -    cpu_memory_rw_debug(cpu_single_env, memaddr, myaddr, length, 0);
> +    CPUDebug *s = container_of(info, CPUDebug, info);
> +
> +    cpu_memory_rw_debug(s->env, memaddr, myaddr, length, 0);
>      return 0;
>  }
>  
> @@ -158,32 +165,35 @@ print_insn_thumb1(bfd_vma pc, disassemble_info *info)
>      ppc  - nonzero means little endian
>      other targets - unused
>   */
> -void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
> +void target_disas(FILE *out, CPUArchState *env, target_ulong code,
> +                  target_ulong size, int flags)
>  {
>      target_ulong pc;
>      int count;
> -    struct disassemble_info disasm_info;
> +    CPUDebug s;
>      int (*print_insn)(bfd_vma pc, disassemble_info *info);
>  
> -    INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
> +    INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
>  
> -    disasm_info.read_memory_func = target_read_memory;
> -    disasm_info.buffer_vma = code;
> -    disasm_info.buffer_length = size;
> -    disasm_info.print_address_func = generic_print_target_address;
> +    s.env = env;
> +    s.info.read_memory_func = target_read_memory;
> +    s.info.buffer_vma = code;
> +    s.info.buffer_length = size;
> +    s.info.print_address_func = generic_print_target_address;
>  
>  #ifdef TARGET_WORDS_BIGENDIAN
> -    disasm_info.endian = BFD_ENDIAN_BIG;
> +    s.info.endian = BFD_ENDIAN_BIG;
>  #else
> -    disasm_info.endian = BFD_ENDIAN_LITTLE;
> +    s.info.endian = BFD_ENDIAN_LITTLE;
>  #endif
>  #if defined(TARGET_I386)
> -    if (flags == 2)
> -        disasm_info.mach = bfd_mach_x86_64;
> -    else if (flags == 1)
> -        disasm_info.mach = bfd_mach_i386_i8086;
> -    else
> -        disasm_info.mach = bfd_mach_i386_i386;
> +    if (flags == 2) {
> +        s.info.mach = bfd_mach_x86_64;
> +    } else if (flags == 1) {
> +        s.info.mach = bfd_mach_i386_i8086;
> +    } else {
> +        s.info.mach = bfd_mach_i386_i386;
> +    }
>      print_insn = print_insn_i386;
>  #elif defined(TARGET_ARM)
>      if (flags & 1) {
> @@ -193,27 +203,28 @@ void target_disas(FILE *out, target_ulong code, 
> target_ulong size, int flags)
>      }
>      if (flags & 2) {
>  #ifdef TARGET_WORDS_BIGENDIAN
> -        disasm_info.endian = BFD_ENDIAN_LITTLE;
> +        s.info.endian = BFD_ENDIAN_LITTLE;
>  #else
> -        disasm_info.endian = BFD_ENDIAN_BIG;
> +        s.info.endian = BFD_ENDIAN_BIG;
>  #endif
>      }
>  #elif defined(TARGET_SPARC)
>      print_insn = print_insn_sparc;
>  #ifdef TARGET_SPARC64
> -    disasm_info.mach = bfd_mach_sparc_v9b;
> +    s.info.mach = bfd_mach_sparc_v9b;
>  #endif
>  #elif defined(TARGET_PPC)
> -    if (flags >> 16)
> -        disasm_info.endian = BFD_ENDIAN_LITTLE;
> +    if (flags >> 16) {
> +        s.info.endian = BFD_ENDIAN_LITTLE;
> +    }
>      if (flags & 0xFFFF) {
>          /* If we have a precise definitions of the instructions set, use it 
> */
> -        disasm_info.mach = flags & 0xFFFF;
> +        s.info.mach = flags & 0xFFFF;
>      } else {
>  #ifdef TARGET_PPC64
> -        disasm_info.mach = bfd_mach_ppc64;
> +        s.info.mach = bfd_mach_ppc64;
>  #else
> -        disasm_info.mach = bfd_mach_ppc;
> +        s.info.mach = bfd_mach_ppc;
>  #endif
>      }
>      print_insn = print_insn_ppc;
> @@ -226,27 +237,27 @@ void target_disas(FILE *out, target_ulong code, 
> target_ulong size, int flags)
>      print_insn = print_insn_little_mips;
>  #endif
>  #elif defined(TARGET_SH4)
> -    disasm_info.mach = bfd_mach_sh4;
> +    s.info.mach = bfd_mach_sh4;
>      print_insn = print_insn_sh;
>  #elif defined(TARGET_ALPHA)
> -    disasm_info.mach = bfd_mach_alpha_ev6;
> +    s.info.mach = bfd_mach_alpha_ev6;
>      print_insn = print_insn_alpha;
>  #elif defined(TARGET_CRIS)
>      if (flags != 32) {
> -        disasm_info.mach = bfd_mach_cris_v0_v10;
> +        s.info.mach = bfd_mach_cris_v0_v10;
>          print_insn = print_insn_crisv10;
>      } else {
> -        disasm_info.mach = bfd_mach_cris_v32;
> +        s.info.mach = bfd_mach_cris_v32;
>          print_insn = print_insn_crisv32;
>      }
>  #elif defined(TARGET_S390X)
> -    disasm_info.mach = bfd_mach_s390_64;
> +    s.info.mach = bfd_mach_s390_64;
>      print_insn = print_insn_s390;
>  #elif defined(TARGET_MICROBLAZE)
> -    disasm_info.mach = bfd_arch_microblaze;
> +    s.info.mach = bfd_arch_microblaze;
>      print_insn = print_insn_microblaze;
>  #elif defined(TARGET_LM32)
> -    disasm_info.mach = bfd_mach_lm32;
> +    s.info.mach = bfd_mach_lm32;
>      print_insn = print_insn_lm32;
>  #else
>      fprintf(out, "0x" TARGET_FMT_lx
> @@ -256,14 +267,14 @@ void target_disas(FILE *out, target_ulong code, 
> target_ulong size, int flags)
>  
>      for (pc = code; size > 0; pc += count, size -= count) {
>       fprintf(out, "0x" TARGET_FMT_lx ":  ", pc);
> -     count = print_insn(pc, &disasm_info);
> +     count = print_insn(pc, &s.info);
>  #if 0
>          {
>              int i;
>              uint8_t b;
>              fprintf(out, " {");
>              for(i = 0; i < count; i++) {
> -                target_read_memory(pc + i, &b, 1, &disasm_info);
> +                target_read_memory(pc + i, &b, 1, &s.info);
>                  fprintf(out, " %02x", b);
>              }
>              fprintf(out, " }");
> @@ -287,28 +298,28 @@ void disas(FILE *out, void *code, unsigned long size)
>  {
>      uintptr_t pc;
>      int count;
> -    struct disassemble_info disasm_info;
> +    CPUDebug s;
>      int (*print_insn)(bfd_vma pc, disassemble_info *info);
>  
> -    INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
> -    disasm_info.print_address_func = generic_print_host_address;
> +    INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
> +    s.info.print_address_func = generic_print_host_address;
>  
> -    disasm_info.buffer = code;
> -    disasm_info.buffer_vma = (uintptr_t)code;
> -    disasm_info.buffer_length = size;
> +    s.info.buffer = code;
> +    s.info.buffer_vma = (uintptr_t)code;
> +    s.info.buffer_length = size;
>  
>  #ifdef HOST_WORDS_BIGENDIAN
> -    disasm_info.endian = BFD_ENDIAN_BIG;
> +    s.info.endian = BFD_ENDIAN_BIG;
>  #else
> -    disasm_info.endian = BFD_ENDIAN_LITTLE;
> +    s.info.endian = BFD_ENDIAN_LITTLE;
>  #endif
>  #if defined(CONFIG_TCG_INTERPRETER)
>      print_insn = print_insn_tci;
>  #elif defined(__i386__)
> -    disasm_info.mach = bfd_mach_i386_i386;
> +    s.info.mach = bfd_mach_i386_i386;
>      print_insn = print_insn_i386;
>  #elif defined(__x86_64__)
> -    disasm_info.mach = bfd_mach_x86_64;
> +    s.info.mach = bfd_mach_x86_64;
>      print_insn = print_insn_i386;
>  #elif defined(_ARCH_PPC)
>      print_insn = print_insn_ppc;
> @@ -316,7 +327,7 @@ void disas(FILE *out, void *code, unsigned long size)
>      print_insn = print_insn_alpha;
>  #elif defined(__sparc__)
>      print_insn = print_insn_sparc;
> -    disasm_info.mach = bfd_mach_sparc_v9b;
> +    s.info.mach = bfd_mach_sparc_v9b;
>  #elif defined(__arm__)
>      print_insn = print_insn_arm;
>  #elif defined(__MIPSEB__)
> @@ -338,7 +349,7 @@ void disas(FILE *out, void *code, unsigned long size)
>  #endif
>      for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
>          fprintf(out, "0x%08" PRIxPTR ":  ", pc);
> -     count = print_insn(pc, &disasm_info);
> +        count = print_insn(pc, &s.info);
>       fprintf(out, "\n");
>       if (count < 0)
>           break;
> @@ -366,16 +377,17 @@ const char *lookup_symbol(target_ulong orig_addr)
>  #include "monitor.h"
>  
>  static int monitor_disas_is_physical;
> -static CPUArchState *monitor_disas_env;
>  
>  static int
>  monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
>                       struct disassemble_info *info)
>  {
> +    CPUDebug *s = container_of(info, CPUDebug, info);
> +
>      if (monitor_disas_is_physical) {
>          cpu_physical_memory_read(memaddr, myaddr, length);
>      } else {
> -        cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
> +        cpu_memory_rw_debug(s->env, memaddr,myaddr, length, 0);
>      }
>      return 0;
>  }
> @@ -394,30 +406,31 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
>                     target_ulong pc, int nb_insn, int is_physical, int flags)
>  {
>      int count, i;
> -    struct disassemble_info disasm_info;
> +    CPUDebug s;
>      int (*print_insn)(bfd_vma pc, disassemble_info *info);
>  
> -    INIT_DISASSEMBLE_INFO(disasm_info, (FILE *)mon, monitor_fprintf);
> +    INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
>  
> -    monitor_disas_env = env;
> +    s.env = env;
>      monitor_disas_is_physical = is_physical;
> -    disasm_info.read_memory_func = monitor_read_memory;
> -    disasm_info.print_address_func = generic_print_target_address;
> +    s.info.read_memory_func = monitor_read_memory;
> +    s.info.print_address_func = generic_print_target_address;
>  
> -    disasm_info.buffer_vma = pc;
> +    s.info.buffer_vma = pc;
>  
>  #ifdef TARGET_WORDS_BIGENDIAN
> -    disasm_info.endian = BFD_ENDIAN_BIG;
> +    s.info.endian = BFD_ENDIAN_BIG;
>  #else
> -    disasm_info.endian = BFD_ENDIAN_LITTLE;
> +    s.info.endian = BFD_ENDIAN_LITTLE;
>  #endif
>  #if defined(TARGET_I386)
> -    if (flags == 2)
> -        disasm_info.mach = bfd_mach_x86_64;
> -    else if (flags == 1)
> -        disasm_info.mach = bfd_mach_i386_i8086;
> -    else
> -        disasm_info.mach = bfd_mach_i386_i386;
> +    if (flags == 2) {
> +        s.info.mach = bfd_mach_x86_64;
> +    } else if (flags == 1) {
> +        s.info.mach = bfd_mach_i386_i8086;
> +    } else {
> +        s.info.mach = bfd_mach_i386_i386;
> +    }
>      print_insn = print_insn_i386;
>  #elif defined(TARGET_ARM)
>      print_insn = print_insn_arm;
> @@ -426,13 +439,13 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
>  #elif defined(TARGET_SPARC)
>      print_insn = print_insn_sparc;
>  #ifdef TARGET_SPARC64
> -    disasm_info.mach = bfd_mach_sparc_v9b;
> +    s.info.mach = bfd_mach_sparc_v9b;
>  #endif
>  #elif defined(TARGET_PPC)
>  #ifdef TARGET_PPC64
> -    disasm_info.mach = bfd_mach_ppc64;
> +    s.info.mach = bfd_mach_ppc64;
>  #else
> -    disasm_info.mach = bfd_mach_ppc;
> +    s.info.mach = bfd_mach_ppc;
>  #endif
>      print_insn = print_insn_ppc;
>  #elif defined(TARGET_M68K)
> @@ -444,13 +457,13 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
>      print_insn = print_insn_little_mips;
>  #endif
>  #elif defined(TARGET_SH4)
> -    disasm_info.mach = bfd_mach_sh4;
> +    s.info.mach = bfd_mach_sh4;
>      print_insn = print_insn_sh;
>  #elif defined(TARGET_S390X)
> -    disasm_info.mach = bfd_mach_s390_64;
> +    s.info.mach = bfd_mach_s390_64;
>      print_insn = print_insn_s390;
>  #elif defined(TARGET_LM32)
> -    disasm_info.mach = bfd_mach_lm32;
> +    s.info.mach = bfd_mach_lm32;
>      print_insn = print_insn_lm32;
>  #else
>      monitor_printf(mon, "0x" TARGET_FMT_lx
> @@ -460,7 +473,7 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
>  
>      for(i = 0; i < nb_insn; i++) {
>       monitor_printf(mon, "0x" TARGET_FMT_lx ":  ", pc);
> -     count = print_insn(pc, &disasm_info);
> +        count = print_insn(pc, &s.info);
>       monitor_printf(mon, "\n");
>       if (count < 0)
>           break;
> diff --git a/disas.h b/disas.h
> index a8a0974..c13ca9a 100644
> --- a/disas.h
> +++ b/disas.h
> @@ -6,7 +6,8 @@
>  #ifdef NEED_CPU_H
>  /* Disassemble this for me please... (debugging). */
>  void disas(FILE *out, void *code, unsigned long size);
> -void target_disas(FILE *out, target_ulong code, target_ulong size, int 
> flags);
> +void target_disas(FILE *out, CPUArchState *env, target_ulong code,
> +                  target_ulong size, int flags);
>  
>  void monitor_disas(Monitor *mon, CPUArchState *env,
>                     target_ulong pc, int nb_insn, int is_physical, int flags);
> diff --git a/qemu-log.h b/qemu-log.h
> index ce6bb09..344eca3 100644
> --- a/qemu-log.h
> +++ b/qemu-log.h
> @@ -84,10 +84,10 @@ static inline void log_cpu_state_mask(int mask, 
> CPUArchState *env1, int flags)
>  }
>  
>  /* disas() and target_disas() to qemu_logfile: */
> -static inline void log_target_disas(target_ulong start, target_ulong len,
> -                                    int flags)
> +static inline void log_target_disas(CPUArchState *env, target_ulong start,
> +                                    target_ulong len, int flags)
>  {
> -    target_disas(qemu_logfile, start, len, flags);
> +    target_disas(qemu_logfile, env, start, len, flags);
>  }
>  
>  static inline void log_disas(void *code, unsigned long size)
> diff --git a/target-alpha/translate.c b/target-alpha/translate.c
> index f707d8d..8c4dd02 100644
> --- a/target-alpha/translate.c
> +++ b/target-alpha/translate.c
> @@ -3477,7 +3477,7 @@ static inline void 
> gen_intermediate_code_internal(CPUAlphaState *env,
>  #ifdef DEBUG_DISAS
>      if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
>          qemu_log("IN: %s\n", lookup_symbol(pc_start));
> -        log_target_disas(pc_start, ctx.pc - pc_start, 1);
> +        log_target_disas(env, pc_start, ctx.pc - pc_start, 1);
>          qemu_log("\n");
>      }
>  #endif
> diff --git a/target-arm/translate.c b/target-arm/translate.c
> index 25433da..7d8f8e5 100644
> --- a/target-arm/translate.c
> +++ b/target-arm/translate.c
> @@ -9968,7 +9968,7 @@ done_generating:
>      if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
>          qemu_log("----------------\n");
>          qemu_log("IN: %s\n", lookup_symbol(pc_start));
> -        log_target_disas(pc_start, dc->pc - pc_start,
> +        log_target_disas(env, pc_start, dc->pc - pc_start,
>                           dc->thumb | (dc->bswap_code << 1));
>          qemu_log("\n");
>      }
> diff --git a/target-cris/translate.c b/target-cris/translate.c
> index 755de65..f8ebc43a 100644
> --- a/target-cris/translate.c
> +++ b/target-cris/translate.c
> @@ -3413,7 +3413,7 @@ gen_intermediate_code_internal(CPUCRISState *env, 
> TranslationBlock *tb,
>  #ifdef DEBUG_DISAS
>  #if !DISAS_CRIS
>       if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
> -             log_target_disas(pc_start, dc->pc - pc_start,
> +                log_target_disas(env, pc_start, dc->pc - pc_start,
>                                   dc->env->pregs[PR_VR]);
>               qemu_log("\nisize=%d osize=%td\n",
>                       dc->pc - pc_start, gen_opc_ptr - gen_opc_buf);
> diff --git a/target-i386/translate.c b/target-i386/translate.c
> index ee75850..bf52eef 100644
> --- a/target-i386/translate.c
> +++ b/target-i386/translate.c
> @@ -8047,7 +8047,7 @@ static inline void 
> gen_intermediate_code_internal(CPUX86State *env,
>          else
>  #endif
>              disas_flags = !dc->code32;
> -        log_target_disas(pc_start, pc_ptr - pc_start, disas_flags);
> +        log_target_disas(env, pc_start, pc_ptr - pc_start, disas_flags);
>          qemu_log("\n");
>      }
>  #endif
> diff --git a/target-lm32/translate.c b/target-lm32/translate.c
> index 77c2866..3307daa 100644
> --- a/target-lm32/translate.c
> +++ b/target-lm32/translate.c
> @@ -1120,7 +1120,7 @@ static void gen_intermediate_code_internal(CPULM32State 
> *env,
>  #ifdef DEBUG_DISAS
>      if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
>          qemu_log("\n");
> -        log_target_disas(pc_start, dc->pc - pc_start, 0);
> +        log_target_disas(env, pc_start, dc->pc - pc_start, 0);
>          qemu_log("\nisize=%d osize=%td\n",
>              dc->pc - pc_start, gen_opc_ptr - gen_opc_buf);
>      }
> diff --git a/target-m68k/translate.c b/target-m68k/translate.c
> index 451ef74..1430d4c 100644
> --- a/target-m68k/translate.c
> +++ b/target-m68k/translate.c
> @@ -3070,7 +3070,7 @@ gen_intermediate_code_internal(CPUM68KState *env, 
> TranslationBlock *tb,
>      if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
>          qemu_log("----------------\n");
>          qemu_log("IN: %s\n", lookup_symbol(pc_start));
> -        log_target_disas(pc_start, dc->pc - pc_start, 0);
> +        log_target_disas(env, pc_start, dc->pc - pc_start, 0);
>          qemu_log("\n");
>      }
>  #endif
> diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
> index 7d864b1..5eaf975 100644
> --- a/target-microblaze/translate.c
> +++ b/target-microblaze/translate.c
> @@ -1913,7 +1913,7 @@ gen_intermediate_code_internal(CPUMBState *env, 
> TranslationBlock *tb,
>      if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
>          qemu_log("\n");
>  #if DISAS_GNU
> -        log_target_disas(pc_start, dc->pc - pc_start, 0);
> +        log_target_disas(env, pc_start, dc->pc - pc_start, 0);
>  #endif
>          qemu_log("\nisize=%d osize=%td\n",
>              dc->pc - pc_start, gen_opc_ptr - gen_opc_buf);
> diff --git a/target-mips/translate.c b/target-mips/translate.c
> index 454e5cc..e00323a 100644
> --- a/target-mips/translate.c
> +++ b/target-mips/translate.c
> @@ -12939,7 +12939,7 @@ done_generating:
>      LOG_DISAS("\n");
>      if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
>          qemu_log("IN: %s\n", lookup_symbol(pc_start));
> -        log_target_disas(pc_start, ctx.pc - pc_start, 0);
> +        log_target_disas(env, pc_start, ctx.pc - pc_start, 0);
>          qemu_log("\n");
>      }
>  #endif
> diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
> index e2cad3a..ff2feb4 100644
> --- a/target-openrisc/translate.c
> +++ b/target-openrisc/translate.c
> @@ -1797,7 +1797,7 @@ static inline void 
> gen_intermediate_code_internal(OpenRISCCPU *cpu,
>  #ifdef DEBUG_DISAS
>      if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
>          qemu_log("\n");
> -        log_target_disas(pc_start, dc->pc - pc_start, 0);
> +        log_target_disas(&cpu->env, pc_start, dc->pc - pc_start, 0);
>          qemu_log("\nisize=%d osize=%td\n",
>              dc->pc - pc_start, gen_opc_ptr - gen_opc_buf);
>      }
> diff --git a/target-ppc/translate.c b/target-ppc/translate.c
> index 1042268..06c58c2 100644
> --- a/target-ppc/translate.c
> +++ b/target-ppc/translate.c
> @@ -9783,7 +9783,7 @@ static inline void 
> gen_intermediate_code_internal(CPUPPCState *env,
>          flags = env->bfd_mach;
>          flags |= ctx.le_mode << 16;
>          qemu_log("IN: %s\n", lookup_symbol(pc_start));
> -        log_target_disas(pc_start, ctx.nip - pc_start, flags);
> +        log_target_disas(env, pc_start, ctx.nip - pc_start, flags);
>          qemu_log("\n");
>      }
>  #endif
> diff --git a/target-s390x/translate.c b/target-s390x/translate.c
> index db464cc..c6267a8 100644
> --- a/target-s390x/translate.c
> +++ b/target-s390x/translate.c
> @@ -5220,7 +5220,7 @@ static inline void 
> gen_intermediate_code_internal(CPUS390XState *env,
>  #if defined(S390X_DEBUG_DISAS)
>      if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
>          qemu_log("IN: %s\n", lookup_symbol(pc_start));
> -        log_target_disas(pc_start, dc.pc - pc_start, 1);
> +        log_target_disas(env, pc_start, dc.pc - pc_start, 1);
>          qemu_log("\n");
>      }
>  #endif
> diff --git a/target-sh4/translate.c b/target-sh4/translate.c
> index 9d955eb..2ae7f03 100644
> --- a/target-sh4/translate.c
> +++ b/target-sh4/translate.c
> @@ -2070,7 +2070,7 @@ gen_intermediate_code_internal(CPUSH4State * env, 
> TranslationBlock * tb,
>  #ifdef DEBUG_DISAS
>      if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
>       qemu_log("IN:\n");      /* , lookup_symbol(pc_start)); */
> -     log_target_disas(pc_start, ctx.pc - pc_start, 0);
> +        log_target_disas(env, pc_start, ctx.pc - pc_start, 0);
>       qemu_log("\n");
>      }
>  #endif
> diff --git a/target-sparc/translate.c b/target-sparc/translate.c
> index 4321393..f410efc 100644
> --- a/target-sparc/translate.c
> +++ b/target-sparc/translate.c
> @@ -5353,7 +5353,7 @@ static inline void 
> gen_intermediate_code_internal(TranslationBlock * tb,
>      if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
>          qemu_log("--------------\n");
>          qemu_log("IN: %s\n", lookup_symbol(pc_start));
> -        log_target_disas(pc_start, last_pc + 4 - pc_start, 0);
> +        log_target_disas(env, pc_start, last_pc + 4 - pc_start, 0);
>          qemu_log("\n");
>      }
>  #endif
> diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c
> index c3cdafa..57b18ac 100644
> --- a/target-unicore32/translate.c
> +++ b/target-unicore32/translate.c
> @@ -2109,7 +2109,7 @@ done_generating:
>      if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
>          qemu_log("----------------\n");
>          qemu_log("IN: %s\n", lookup_symbol(pc_start));
> -        log_target_disas(pc_start, dc->pc - pc_start, 0);
> +        log_target_disas(env, pc_start, dc->pc - pc_start, 0);
>          qemu_log("\n");
>      }
>  #endif

MIPS part:

Acked-by: Aurelien Jarno <address@hidden>

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
address@hidden                 http://www.aurel32.net
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[Qemu-devel] [PATCH 0/5] cpu_single_env cleanup, Blue Swirl, 2012/10/28
- [Qemu-devel] [PATCH 1/5] disas: avoid using cpu_single_env, Blue Swirl, 2012/10/28
  - Re: [Qemu-devel] [PATCH 1/5] disas: avoid using cpu_single_env, Richard Henderson, 2012/10/29
  - Re: [Qemu-devel] [PATCH 1/5] disas: avoid using cpu_single_env, Andreas Färber, 2012/10/29
  - Re: [Qemu-devel] [PATCH 1/5] disas: avoid using cpu_single_env, Aurelien Jarno <=
  - Message not available
    - Re: [Qemu-devel] [PATCH 1/5] disas: avoid using cpu_single_env, guanxuetao, 2012/10/31
- [Qemu-devel] [PATCH 2/5] kvm: avoid using cpu_single_env, Blue Swirl, 2012/10/28
  - Re: [Qemu-devel] [PATCH 2/5] kvm: avoid using cpu_single_env, Andreas Färber, 2012/10/30
- [Qemu-devel] [PATCH 3/5] target-unicore32: avoid using cpu_single_env, Blue Swirl, 2012/10/28
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    - Re: [Qemu-devel] [PATCH 3/5] target-unicore32: avoid using cpu_single_env, guanxuetao, 2012/10/30
  - Re: [Qemu-devel] [PATCH 3/5] target-unicore32: avoid using cpu_single_env, Andreas Färber, 2012/10/30
- [Qemu-devel] [PATCH 4/5] target-xtensa: avoid using cpu_single_env, Blue Swirl, 2012/10/28
  - Re: [Qemu-devel] [PATCH 4/5] target-xtensa: avoid using cpu_single_env, Max Filippov, 2012/10/29
  - Re: [Qemu-devel] [PATCH 4/5] target-xtensa: avoid using cpu_single_env, Andreas Färber, 2012/10/30
- [Qemu-devel] [PATCH 5/5] target-i386: avoid using cpu_single_env, Blue Swirl, 2012/10/28
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