[Qemu-devel] [Bug 1079080] Re: ARM instruction "srs" wrong behaviour

[vcesson]

** Attachment added: "test case dtb"
   
https://bugs.launchpad.net/qemu/+bug/1079080/+attachment/3528448/+files/xilinx_zynq.dtb

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https://bugs.launchpad.net/bugs/1079080

Title:
  ARM instruction "srs" wrong behaviour

Status in QEMU:
  Confirmed

Bug description:
  Quote from ARM Architecture Reference Manual ARMv7-A and ARMv7-R :
  "Store Return State stores the LR and SPSR of the current mode to the stack 
of a specified mode"

  Problem:
  When executing this instruction, the register stored is CPSR instead of SPSR.

  Context:
  Using QEMU 1.2.0 to simulate a Zynq application (processor Cortex-a9 mpcore) 
with the following command line:
  qemu-system-arm -M xilinx-zynq-a9 -m 512 -serial null -serial mon:stdio -dtb 
/home/vcesson/workspace/xilinx_zynq.dtb -kernel 
install/tests/io/serial/current/tests/serial2 -S -s -nographic

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