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[Qemu-devel] [PATCH 06/12] KVM/MIPS: Define APIs to convert Guest KSEG0
From: |
Sanjay Lal |
Subject: |
[Qemu-devel] [PATCH 06/12] KVM/MIPS: Define APIs to convert Guest KSEG0 <-> Guest Physical addresses. |
Date: |
Sat, 2 Mar 2013 07:18:41 -0800 |
In trap and emulate mode both the guest kernel and guest userspace execute in
UM:
Guest User address space: 0x00000000 -> 0x40000000
Guest Kernel Unmapped: 0x40000000 -> 0x60000000
Guest Kernel Mapped: 0x60000000 -> 0x80000000
---
hw/mips_addr.c | 14 ++++++++++++++
hw/mips_cpudevs.h | 4 ++++
2 files changed, 18 insertions(+)
diff --git a/hw/mips_addr.c b/hw/mips_addr.c
index aa1c7d8..c24d2d9 100644
--- a/hw/mips_addr.c
+++ b/hw/mips_addr.c
@@ -22,13 +22,27 @@
#include "hw.h"
#include "mips_cpudevs.h"
+#include "sysemu/kvm.h"
+
uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr)
{
return addr & 0x7fffffffll;
}
+
+uint64_t cpu_mips_kvm_um_kseg0_to_phys(void *opaque, uint64_t addr)
+{
+ return addr & 0x3fffffffll;
+}
+
uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr)
{
return addr | ~0x7fffffffll;
}
+
+
+uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr)
+{
+ return addr | 0x40000000ll;
+}
diff --git a/hw/mips_cpudevs.h b/hw/mips_cpudevs.h
index 6bea24b..9e5af37 100644
--- a/hw/mips_cpudevs.h
+++ b/hw/mips_cpudevs.h
@@ -6,6 +6,10 @@
uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr);
uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr);
+uint64_t cpu_mips_kvm_um_kseg0_to_phys(void *opaque, uint64_t addr);
+uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr);
+
+
/* mips_int.c */
void cpu_mips_irq_init_cpu(CPUMIPSState *env);
--
1.7.11.3
- [Qemu-devel] [PATCH 12/12] KVM/MIPS: General KVM support and support for SMP Guests, (continued)
- [Qemu-devel] [PATCH 12/12] KVM/MIPS: General KVM support and support for SMP Guests, Sanjay Lal, 2013/03/02
- [Qemu-devel] [PATCH 08/12] KVM/MIPS: Enable KVM/MIPS for MIPS targets. Add MIPS GIC code to the build., Sanjay Lal, 2013/03/02
- [Qemu-devel] [PATCH 01/12] KVM/MIPS: Bootcode for MIPS SMP configurations with a GCMP, Sanjay Lal, 2013/03/02
- [Qemu-devel] [PATCH 01/12] MIPS: Bootcode for MIPS SMP configurations with a GCMP, Sanjay Lal, 2013/03/02
- [Qemu-devel] [PATCH 05/12] KVM/MIPS: In KVM mode, inject IRQ2 (I/O) interupts via ioctls(). COP0 emulation is in-kernel, Sanjay Lal, 2013/03/02
- [Qemu-devel] [PATCH 04/12] KVM/MIPS: Do not start the periodic timer in KVM mode. Compare/Count timer interrupts are handled in-kernel., Sanjay Lal, 2013/03/02
- [Qemu-devel] [PATCH 06/12] KVM/MIPS: Define APIs to convert Guest KSEG0 <-> Guest Physical addresses.,
Sanjay Lal <=
- [Qemu-devel] [PATCH 10/12] KVM/MIPS: Set page size to 16K in KVM mode., Sanjay Lal, 2013/03/02
- Re: [Qemu-devel] [PATCH 00/12] KVM Support for MIPS32 Processors, Zhang, Yang Z, 2013/03/03
- Re: [Qemu-devel] [PATCH 00/12] KVM Support for MIPS32 Processors, Andreas Färber, 2013/03/04