[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 01/12] ARM: Extract the disas struct to a header fil
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PATCH 01/12] ARM: Extract the disas struct to a header file |
Date: |
Wed, 6 Mar 2013 03:01:09 +0100 |
We will need to share the disassembly status struct between AArch32 and
AArch64 modes. So put it into a header file that both sides can use.
Signed-off-by: Alexander Graf <address@hidden>
---
target-arm/translate.c | 24 +-----------------------
target-arm/translate.h | 27 +++++++++++++++++++++++++++
2 files changed, 28 insertions(+), 23 deletions(-)
create mode 100644 target-arm/translate.h
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 35a21be..7dbf781 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -45,29 +45,7 @@
#define ARCH(x) do { if (!ENABLE_ARCH_##x) goto illegal_op; } while(0)
-/* internal defines */
-typedef struct DisasContext {
- target_ulong pc;
- int is_jmp;
- /* Nonzero if this instruction has been conditionally skipped. */
- int condjmp;
- /* The label that will be jumped to when the instruction is skipped. */
- int condlabel;
- /* Thumb-2 conditional execution bits. */
- int condexec_mask;
- int condexec_cond;
- struct TranslationBlock *tb;
- int singlestep_enabled;
- int thumb;
- int bswap_code;
-#if !defined(CONFIG_USER_ONLY)
- int user;
-#endif
- int vfp_enabled;
- int vec_len;
- int vec_stride;
-} DisasContext;
-
+#include "translate.h"
static uint32_t gen_opc_condexec_bits[OPC_BUF_SIZE];
#if defined(CONFIG_USER_ONLY)
diff --git a/target-arm/translate.h b/target-arm/translate.h
new file mode 100644
index 0000000..e727bc6
--- /dev/null
+++ b/target-arm/translate.h
@@ -0,0 +1,27 @@
+#ifndef TARGET_ARM_TRANSLATE_H
+#define TARGET_ARM_TRANSLATE_H
+
+/* internal defines */
+typedef struct DisasContext {
+ target_ulong pc;
+ int is_jmp;
+ /* Nonzero if this instruction has been conditionally skipped. */
+ int condjmp;
+ /* The label that will be jumped to when the instruction is skipped. */
+ int condlabel;
+ /* Thumb-2 conditional execution bits. */
+ int condexec_mask;
+ int condexec_cond;
+ struct TranslationBlock *tb;
+ int singlestep_enabled;
+ int thumb;
+ int bswap_code;
+#if !defined(CONFIG_USER_ONLY)
+ int user;
+#endif
+ int vfp_enabled;
+ int vec_len;
+ int vec_stride;
+} DisasContext;
+
+#endif /* TARGET_ARM_TRANSLATE_H */
--
1.6.0.2
- [Qemu-devel] [PATCH 09/12] linux-user: Fix up AArch64 syscall handlers, (continued)
- [Qemu-devel] [PATCH 05/12] AArch64: Add gdb stub, Alexander Graf, 2013/03/05
- [Qemu-devel] [PATCH 07/12] linux-user: AArch64 requires at least 3.8.0, Alexander Graf, 2013/03/05
- [Qemu-devel] [PATCH 11/12] linux-user: Add AArch64 support, Alexander Graf, 2013/03/05
- [Qemu-devel] [PATCH 01/12] ARM: Extract the disas struct to a header file,
Alexander Graf <=
- [Qemu-devel] [PATCH 06/12] linux-user: Don't treat aarch64 cpu names specially, Alexander Graf, 2013/03/05
- [Qemu-devel] [PATCH 08/12] linux-user: Add syscall handling for AArch64, Alexander Graf, 2013/03/05
- [Qemu-devel] [PATCH 10/12] linux-user: Add signal handling for AArch64, Alexander Graf, 2013/03/05
- [Qemu-devel] [PATCH 04/12] ARM: Add AArch64 translation stub, Alexander Graf, 2013/03/05