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[Qemu-devel] [PATCH 16/17] target-arm: Override do_interrupt for ARMv7-M
From: |
Andreas Färber |
Subject: |
[Qemu-devel] [PATCH 16/17] target-arm: Override do_interrupt for ARMv7-M profile |
Date: |
Tue, 12 Mar 2013 10:49:17 +0100 |
Enable ARMCPUInfo to specify a custom class_init functions.
Introduce arm_v7m_class_init() and use it for "cortex-m3" model.
Instead of forwarding from arm_cpu_do_interrupt() to do_interrupt_v7m(),
override CPUClass::do_interrupt with arm_v7m_cpu_do_interrupt()
in arm_v7m_class_init().
Acked-by: Peter Maydell <address@hidden>
Signed-off-by: Andreas Färber <address@hidden>
---
target-arm/cpu-qom.h | 1 +
target-arm/cpu.c | 14 +++++++++++++-
target-arm/helper.c | 10 +++++-----
3 Dateien geändert, 19 Zeilen hinzugefügt(+), 6 Zeilen entfernt(-)
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index eeecc92..2589550 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -114,5 +114,6 @@ static inline ARMCPU *arm_env_get_cpu(CPUARMState *env)
void register_cp_regs_for_features(ARMCPU *cpu);
void arm_cpu_do_interrupt(CPUState *cpu);
+void arm_v7m_cpu_do_interrupt(CPUState *cpu);
#endif
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index aeaa3b7..a1e9093 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -412,6 +412,15 @@ static void cortex_m3_initfn(Object *obj)
cpu->midr = 0x410fc231;
}
+static void arm_v7m_class_init(ObjectClass *oc, void *data)
+{
+#ifndef CONFIG_USER_ONLY
+ CPUClass *cc = CPU_CLASS(oc);
+
+ cc->do_interrupt = arm_v7m_cpu_do_interrupt;
+#endif
+}
+
static const ARMCPRegInfo cortexa8_cp_reginfo[] = {
{ .name = "L2LOCKDOWN", .cp = 15, .crn = 9, .crm = 0, .opc1 = 1, .opc2 = 0,
.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
@@ -752,6 +761,7 @@ static void arm_any_initfn(Object *obj)
typedef struct ARMCPUInfo {
const char *name;
void (*initfn)(Object *obj);
+ void (*class_init)(ObjectClass *oc, void *data);
} ARMCPUInfo;
static const ARMCPUInfo arm_cpus[] = {
@@ -766,7 +776,8 @@ static const ARMCPUInfo arm_cpus[] = {
{ .name = "arm1136", .initfn = arm1136_initfn },
{ .name = "arm1176", .initfn = arm1176_initfn },
{ .name = "arm11mpcore", .initfn = arm11mpcore_initfn },
- { .name = "cortex-m3", .initfn = cortex_m3_initfn },
+ { .name = "cortex-m3", .initfn = cortex_m3_initfn,
+ .class_init = arm_v7m_class_init },
{ .name = "cortex-a8", .initfn = cortex_a8_initfn },
{ .name = "cortex-a9", .initfn = cortex_a9_initfn },
{ .name = "cortex-a15", .initfn = cortex_a15_initfn },
@@ -812,6 +823,7 @@ static void cpu_register(const ARMCPUInfo *info)
.instance_size = sizeof(ARMCPU),
.instance_init = info->initfn,
.class_size = sizeof(ARMCPUClass),
+ .class_init = info->class_init,
};
type_info.name = g_strdup_printf("%s-" TYPE_ARM_CPU, info->name);
diff --git a/target-arm/helper.c b/target-arm/helper.c
index b4cbb87..fd055e8 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -1725,8 +1725,10 @@ static void do_v7m_exception_exit(CPUARMState *env)
pointer. */
}
-static void do_interrupt_v7m(CPUARMState *env)
+void arm_v7m_cpu_do_interrupt(CPUState *cs)
{
+ ARMCPU *cpu = ARM_CPU(cs);
+ CPUARMState *env = &cpu->env;
uint32_t xpsr = xpsr_read(env);
uint32_t lr;
uint32_t addr;
@@ -1811,10 +1813,8 @@ void arm_cpu_do_interrupt(CPUState *cs)
int new_mode;
uint32_t offset;
- if (IS_M(env)) {
- do_interrupt_v7m(env);
- return;
- }
+ assert(!IS_M(env));
+
/* TODO: Vectored interrupt controller. */
switch (env->exception_index) {
case EXCP_UDEF:
--
1.7.10.4
- [Qemu-devel] [PATCH 10/17] target-i386: Update VMStateDescription to X86CPU, (continued)
- [Qemu-devel] [PATCH 10/17] target-i386: Update VMStateDescription to X86CPU, Andreas Färber, 2013/03/12
- [Qemu-devel] [PATCH 06/17] vmstate: Make vmstate_register() static inline, Andreas Färber, 2013/03/12
- [Qemu-devel] [PATCH 08/17] cpu: Register VMStateDescription through CPUState, Andreas Färber, 2013/03/12
- [Qemu-devel] [PATCH 11/17] target-cris/helper.c: Update Coding Style, Andreas Färber, 2013/03/12
- [Qemu-devel] [PATCH 04/17] target-sh4: Introduce SuperHCPU subclasses, Andreas Färber, 2013/03/12
- [Qemu-devel] [PATCH 07/17] stubs: Add a vmstate_dummy struct for CONFIG_USER_ONLY, Andreas Färber, 2013/03/12
- [Qemu-devel] [PATCH 17/17] target-lm32: Update VMStateDescription to LM32CPU, Andreas Färber, 2013/03/12
- [Qemu-devel] [PATCH 05/17] target-sh4: Move PVR/PRR/CVR into SuperHCPUClass, Andreas Färber, 2013/03/12
- [Qemu-devel] [PATCH 09/17] cpu: Introduce cpu_class_set_vmsd(), Andreas Färber, 2013/03/12
- [Qemu-devel] [PATCH 02/17] monitor: Use qemu_get_cpu() in monitor_set_cpu(), Andreas Färber, 2013/03/12
- [Qemu-devel] [PATCH 16/17] target-arm: Override do_interrupt for ARMv7-M profile,
Andreas Färber <=
- [Qemu-devel] [PATCH 13/17] exec: Pass CPUState to cpu_reset_interrupt(), Andreas Färber, 2013/03/12
- [Qemu-devel] [PATCH 15/17] cpu: Replace do_interrupt() by CPUClass::do_interrupt method, Andreas Färber, 2013/03/12
- [Qemu-devel] [PATCH 14/17] cpu: Pass CPUState to cpu_interrupt(), Andreas Färber, 2013/03/12
- [Qemu-devel] [PATCH 12/17] cpu: Move halted and interrupt_request fields to CPUState, Andreas Färber, 2013/03/12