qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-devel] [PATCH 2/4] Ensure good ordering of memory instruction in c


From: Stefan Weil
Subject: [Qemu-devel] [PATCH 2/4] Ensure good ordering of memory instruction in cpu_exec
Date: Fri, 12 Apr 2013 18:34:44 +0200

From: Olivier Hainque <address@hidden>

The IO thread, when it senses cpu_single_env == 0, expects exit_request
to be checked later on. A compiler scheduling constraint is not strong
enough to ensure this on modern architecture. A memory fence is needed
as well.

Signed-off-by: Olivier Hainque <address@hidden>
Signed-off-by: Fabien Chouteau <address@hidden>
Reviewed-by: Paolo Bonzini <address@hidden>
Signed-off-by: Stefan Weil <address@hidden>
---
 cpu-exec.c |    8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/cpu-exec.c b/cpu-exec.c
index e74e556..aa8fa89 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -217,6 +217,14 @@ int cpu_exec(CPUArchState *env)
 
     cpu_single_env = env;
 
+    /* As long as cpu_single_env is null, up to the assignment just above,
+     * requests by other threads to exit the execution loop are expected to
+     * be issued using the exit_request global. We must make sure that our
+     * evaluation of the global value is performed past the cpu_single_env
+     * value transition point, which requires a memory barrier as well as
+     * an instruction scheduling constraint on modern architectures.  */
+    smp_mb();
+
     if (unlikely(exit_request)) {
         cpu->exit_request = 1;
     }
-- 
1.7.10.4




reply via email to

[Prev in Thread] Current Thread [Next in Thread]