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[Qemu-devel] [PATCH v5 33/33] tcg-ppc64: Handle deposit of zero
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v5 33/33] tcg-ppc64: Handle deposit of zero |
Date: |
Mon, 15 Apr 2013 20:41:12 +0200 |
The TCG optimizer does great work when inserting constants, being able
to fold the open-coded deposit expansion to just an AND or an OR. Avoid
a bit the regression caused by having the deposit opcode by expanding
deposit of zero as an AND.
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/ppc64/tcg-target.c | 22 ++++++++++++++++------
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 0f33583..0fcf2b5 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-target.c
@@ -1928,12 +1928,22 @@ static void tcg_out_op (TCGContext *s, TCGOpcode opc,
const TCGArg *args,
break;
case INDEX_op_deposit_i32:
- tcg_out_rlw(s, RLWIMI, args[0], args[2], args[3],
- 32 - args[3] - args[4], 31 - args[3]);
+ if (const_args[2]) {
+ uint32_t mask = ((2u << (args[4] - 1)) - 1) << args[3];
+ tcg_out_andi32(s, args[0], args[0], ~mask);
+ } else {
+ tcg_out_rlw(s, RLWIMI, args[0], args[2], args[3],
+ 32 - args[3] - args[4], 31 - args[3]);
+ }
break;
case INDEX_op_deposit_i64:
- tcg_out_rld(s, RLDIMI, args[0], args[2], args[3],
- 64 - args[3] - args[4]);
+ if (const_args[2]) {
+ uint64_t mask = ((2ull << (args[4] - 1)) - 1) << args[3];
+ tcg_out_andi64(s, args[0], args[0], ~mask);
+ } else {
+ tcg_out_rld(s, RLDIMI, args[0], args[2], args[3],
+ 64 - args[3] - args[4]);
+ }
break;
case INDEX_op_movcond_i32:
@@ -2136,8 +2146,8 @@ static const TCGTargetOpDef ppc_op_defs[] = {
{ INDEX_op_bswap32_i64, { "r", "r" } },
{ INDEX_op_bswap64_i64, { "r", "r" } },
- { INDEX_op_deposit_i32, { "r", "0", "r" } },
- { INDEX_op_deposit_i64, { "r", "0", "r" } },
+ { INDEX_op_deposit_i32, { "r", "0", "rZ" } },
+ { INDEX_op_deposit_i64, { "r", "0", "rZ" } },
{ INDEX_op_add2_i64, { "r", "r", "r", "rI", "r", "rZM" } },
{ INDEX_op_sub2_i64, { "r", "r", "rI", "r", "rZM", "r" } },
--
1.8.1.4
- [Qemu-devel] [PATCH v5 22/33] tcg-ppc64: Handle constant inputs for some compound logicals, (continued)
- [Qemu-devel] [PATCH v5 22/33] tcg-ppc64: Handle constant inputs for some compound logicals, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 23/33] tcg-ppc64: Implement deposit, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 24/33] tcg-ppc64: Use I constraint for mul, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 25/33] tcg-ppc64: Use TCGType throughout compares, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 26/33] tcg-ppc64: Cleanup i32 constants to tcg_out_cmp, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 27/33] tcg-ppc64: Use MFOCRF instead of MFCR, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 28/33] tcg-ppc64: Use ISEL for setcond, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 30/33] tcg-ppc64: Use getauxval for ISA detection, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 31/33] tcg-ppc64: Implement add2/sub2_i64, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 32/33] tcg-ppc64: Implement mulu2/muls2_i64, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 33/33] tcg-ppc64: Handle deposit of zero,
Richard Henderson <=
- [Qemu-devel] [PATCH v5 29/33] tcg-ppc64: Implement movcond, Richard Henderson, 2013/04/15
- [Qemu-devel] [PATCH v5 21/33] tcg-ppc64: Implement compound logicals, Richard Henderson, 2013/04/15
- Re: [Qemu-devel] [PATCH v5 00/33] Modernize tcg/ppc64, Aurelien Jarno, 2013/04/15