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From: | Gerd Hoffmann |
Subject: | Re: [Qemu-devel] [PATCH v2 2/5] pci: store PCI hole ranges in guestinfo structure |
Date: | Fri, 31 May 2013 07:43:37 +0200 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130513 Thunderbird/17.0.6 |
Hi, > I see. I'll figure out the details and add a comment to this end. > > But that's for the 32 bit window - I don't see it playing > with mtrrs for the 64 bit ranges. > So I'm guessing alignment isn't needed there, right? mtrr's are a 32bit thing anyway IIRC. I still would place the 64bit window aligned. Given that 36 physical address lines (-> 64G address space) used to be quite common until recently I think reserving 16G from 64G downwards would be a good pick. For guests with *lots* of memory we could move the hole to be just below 1T and maybe also make it larger. cheers, Gerd
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