Re: [Qemu-devel] [PATCH 04/30] add a header file for atomic operations

[liu ping fan]

On Mon, Jul 1, 2013 at 9:20 PM, Anthony Liguori <address@hidden> wrote:
> Paolo Bonzini <address@hidden> writes:
>
>> Il 01/07/2013 15:00, Anthony Liguori ha scritto:
>>>> I
>>>> > cannot find the commit exactly, but I think mst added specific code for
>>>> > that.
>>> Right, I'm not questioning whether these functions have strong enough
>>> semantics in their implementation, but asking what their contract should
>>> be.
>>>
>>> Either we should document that these functions have atomic semantics or
>>> we should introduce another variant that guarantee atomic access.
>>>
>>> I think the later makes more sense since the majority of users probably
>>> don't need atomic semantics.
>>
>> I think many of these loads and stores do, actually; perhaps most.  It
>> also matches what hardware does.
>
> Hrm, I'm not sure if that's true.  PCI has an explicit LOCK# bit to
> enable exclusive access so my assumption would be that it doesn't by
> default.
>
Is it a huge but another topic -- implement atomic on device register
other than using?  For virtio,  using fence around but outside the
st[u][wlb]_phys when needed?

Regards,
Pingfan
> But either way, we should document the semantics.
>
> Regards,
>
> Anthony Liguori
>
>>
>> Paolo
>