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[Qemu-devel] [PULL 27/28] linux-user: Add AArch64 support
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 27/28] linux-user: Add AArch64 support |
Date: |
Tue, 10 Sep 2013 19:52:21 +0100 |
From: Alexander Graf <address@hidden>
This patch adds support for AArch64 in all the small corners of
linux-user (primarily in image loading and startup code).
Signed-off-by: Alexander Graf <address@hidden>
Signed-off-by: John Rigby <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Message-id: address@hidden
[PMM:
* removed some unnecessary #defines from syscall.h
* catch attempts to use a 32 bit only cpu with aarch64-linux-user
* termios stuff moved into its own patch
* we specify our minimum uname version here now
]
Signed-off-by: Peter Maydell <address@hidden>
---
linux-user/aarch64/syscall.h | 9 +++++++++
linux-user/elfload.c | 15 +++++++++++++--
linux-user/main.c | 16 ++++++++++++++++
3 files changed, 38 insertions(+), 2 deletions(-)
create mode 100644 linux-user/aarch64/syscall.h
diff --git a/linux-user/aarch64/syscall.h b/linux-user/aarch64/syscall.h
new file mode 100644
index 0000000..aef419e
--- /dev/null
+++ b/linux-user/aarch64/syscall.h
@@ -0,0 +1,9 @@
+struct target_pt_regs {
+ uint64_t regs[31];
+ uint64_t sp;
+ uint64_t pc;
+ uint64_t pstate;
+};
+
+#define UNAME_MACHINE "aarch64"
+#define UNAME_MINIMUM_RELEASE "3.8.0"
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 72d9270..8dd424d 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -269,16 +269,26 @@ static void elf_core_copy_regs(target_elf_gregset_t
*regs, const CPUX86State *en
#define ELF_START_MMAP 0x80000000
-#define elf_check_arch(x) ( (x) == EM_ARM )
+#define elf_check_arch(x) ((x) == ELF_MACHINE)
+#define ELF_ARCH ELF_MACHINE
+
+#ifdef TARGET_AARCH64
+#define ELF_CLASS ELFCLASS64
+#else
#define ELF_CLASS ELFCLASS32
-#define ELF_ARCH EM_ARM
+#endif
static inline void init_thread(struct target_pt_regs *regs,
struct image_info *infop)
{
abi_long stack = infop->start_stack;
memset(regs, 0, sizeof(*regs));
+
+#ifdef TARGET_AARCH64
+ regs->pc = infop->entry & ~0x3ULL;
+ regs->sp = stack;
+#else
regs->ARM_cpsr = 0x10;
if (infop->entry & 1)
regs->ARM_cpsr |= CPSR_T;
@@ -292,6 +302,7 @@ static inline void init_thread(struct target_pt_regs *regs,
/* For uClinux PIC binaries. */
/* XXX: Linux does this only on ARM with no MMU (do we care ?) */
regs->ARM_r10 = infop->start_data;
+#endif
}
#define ELF_NREG 18
diff --git a/linux-user/main.c b/linux-user/main.c
index 8838305..01e3cd4 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -3968,6 +3968,22 @@ int main(int argc, char **argv, char **envp)
cpu_x86_load_seg(env, R_FS, 0);
cpu_x86_load_seg(env, R_GS, 0);
#endif
+#elif defined(TARGET_AARCH64)
+ {
+ int i;
+
+ if (!(arm_feature(env, ARM_FEATURE_AARCH64))) {
+ fprintf(stderr,
+ "The selected ARM CPU does not support 64 bit mode\n");
+ exit(1);
+ }
+
+ for (i = 0; i < 31; i++) {
+ env->xregs[i] = regs->regs[i];
+ }
+ env->pc = regs->pc;
+ env->xregs[31] = regs->sp;
+ }
#elif defined(TARGET_ARM)
{
int i;
--
1.7.9.5
- [Qemu-devel] [PULL 23/28] linux-user: Make sure NWFPE code is 32 bit ARM only, (continued)
- [Qemu-devel] [PULL 23/28] linux-user: Make sure NWFPE code is 32 bit ARM only, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 25/28] linux-user: Add AArch64 termbits.h definitions, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 21/28] linux-user: Fix up AArch64 syscall handlers, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 19/28] linux-user: Add cpu loop for AArch64, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 18/28] linux-user: Don't treat AArch64 cpu names specially, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 24/28] linux-user: Implement cpu_set_tls() and cpu_clone_regs() for AArch64, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 10/28] target-arm: Export cpu_env, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 20/28] linux-user: Add syscall number definitions for AArch64, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 07/28] abitypes.h: Remove incorrect ARM ABI_LLONG_ALIGNMENT, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 14/28] target-arm: Disable 32 bit CPUs in 64 bit linux-user builds, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 27/28] linux-user: Add AArch64 support,
Peter Maydell <=
- [Qemu-devel] [PULL 22/28] linux-user: Add signal handling for AArch64, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 16/28] target-arm: Add AArch64 translation stub, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 03/28] target-arm: Avoid "1 << 31" undefined behaviour, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 01/28] target-arm: Make '-cpu any' available in linux-user mode only, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 13/28] target-arm: Add new AArch64CPUInfo base class and subclasses, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 09/28] target-arm: Extract the disas struct to a header file, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 11/28] target-arm: Fix target_ulong/uint32_t confusions, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 02/28] target-arm: Use sextract32() in branch decode, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 12/28] target-arm: Pass DisasContext* to gen_set_pc_im(), Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 17/28] target-arm: Add AArch64 gdbstub support, Peter Maydell, 2013/09/10