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[Qemu-devel] [RFC 14/16] tcg: Implement indirect memory registers
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [RFC 14/16] tcg: Implement indirect memory registers |
Date: |
Thu, 19 Sep 2013 14:25:06 -0700 |
That is, global_mem registers whose base is another global_mem
register, rather than a fixed register.
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/tcg.c | 104 ++++++++++++++++++++++++++++++++++++++++++--------------------
tcg/tcg.h | 2 ++
2 files changed, 73 insertions(+), 33 deletions(-)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 3591491..eb4ed0d 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -412,17 +412,23 @@ int tcg_global_mem_new_internal(TCGType type, TCGv_ptr
base,
TCGContext *s = &tcg_ctx;
TCGTemp *base_ts = &s->temps[GET_TCGV_PTR(base)];
TCGTemp *ts = tcg_global_alloc(s);
- int bigendian = 0;
+ int indirect_reg = 0, bigendian = 0;
#ifdef TCG_TARGET_WORDS_BIGENDIAN
bigendian = 1;
#endif
+ if (!base_ts->fixed_reg) {
+ indirect_reg = 1;
+ base_ts->indirect_base = 1;
+ }
+
if (TCG_TARGET_REG_BITS == 32 && type == TCG_TYPE_I64) {
TCGTemp *ts2 = tcg_global_alloc(s);
char buf[64];
ts->base_type = TCG_TYPE_I64;
ts->type = TCG_TYPE_I32;
+ ts->indirect_reg = indirect_reg;
ts->mem_allocated = 1;
ts->mem_base = base_ts;
ts->mem_offset = offset + bigendian * 4;
@@ -433,6 +439,7 @@ int tcg_global_mem_new_internal(TCGType type, TCGv_ptr base,
assert(ts2 == ts + 1);
ts2->base_type = TCG_TYPE_I64;
ts2->type = TCG_TYPE_I32;
+ ts2->indirect_reg = indirect_reg;
ts2->mem_allocated = 1;
ts2->mem_base = base_ts;
ts2->mem_offset = offset + (1 - bigendian) * 4;
@@ -442,6 +449,7 @@ int tcg_global_mem_new_internal(TCGType type, TCGv_ptr base,
} else {
ts->base_type = type;
ts->type = type;
+ ts->indirect_reg = indirect_reg;
ts->mem_allocated = 1;
ts->mem_base = base_ts;
ts->mem_offset = offset;
@@ -1585,8 +1593,10 @@ static void temp_allocate_frame(TCGContext *s, int temp)
s->current_frame_offset += sizeof(tcg_target_long);
}
+static void temp_load(TCGContext *, TCGTemp *, TCGRegSet, TCGRegSet);
+
/* sync register 'reg' by saving it to the corresponding temporary */
-static inline void tcg_reg_sync(TCGContext *s, TCGReg reg)
+static void tcg_reg_sync(TCGContext *s, TCGReg reg, TCGRegSet allocated_regs)
{
TCGTemp *ts = s->reg_to_temp[reg];
@@ -1594,6 +1604,11 @@ static inline void tcg_reg_sync(TCGContext *s, TCGReg
reg)
if (!ts->mem_coherent && !ts->fixed_reg) {
if (!ts->mem_allocated) {
temp_allocate_frame(s, temp_idx(s, ts));
+ } else if (ts->indirect_reg) {
+ tcg_regset_set_reg(allocated_regs, ts->reg);
+ temp_load(s, ts->mem_base,
+ tcg_target_available_regs[TCG_TYPE_PTR],
+ allocated_regs);
}
tcg_out_st(s, ts->type, reg, ts->mem_base->reg, ts->mem_offset);
}
@@ -1601,25 +1616,26 @@ static inline void tcg_reg_sync(TCGContext *s, TCGReg
reg)
}
/* free register 'reg' by spilling the corresponding temporary if necessary */
-static void tcg_reg_free(TCGContext *s, TCGReg reg)
+static void tcg_reg_free(TCGContext *s, TCGReg reg, TCGRegSet allocated_regs)
{
TCGTemp *ts = s->reg_to_temp[reg];
if (ts != NULL) {
- tcg_reg_sync(s, reg);
+ tcg_reg_sync(s, reg, allocated_regs);
ts->val_type = TEMP_VAL_MEM;
s->reg_to_temp[reg] = NULL;
}
}
/* Allocate a register belonging to reg1 & ~reg2 */
-static TCGReg tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2)
+static TCGReg tcg_reg_alloc(TCGContext *s, TCGRegSet desired_regs,
+ TCGRegSet allocated_regs)
{
int i;
TCGReg reg;
TCGRegSet reg_ct;
- tcg_regset_andnot(reg_ct, reg1, reg2);
+ tcg_regset_andnot(reg_ct, desired_regs, allocated_regs);
/* first try free registers */
for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
@@ -1632,7 +1648,7 @@ static TCGReg tcg_reg_alloc(TCGContext *s, TCGRegSet
reg1, TCGRegSet reg2)
for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
reg = tcg_target_reg_alloc_order[i];
if (tcg_regset_test_reg(reg_ct, reg)) {
- tcg_reg_free(s, reg);
+ tcg_reg_free(s, reg, allocated_regs);
return reg;
}
}
@@ -1652,22 +1668,28 @@ static void temp_load(TCGContext *s, TCGTemp *ts,
TCGRegSet desired_regs,
}
ts->reg = tcg_reg_alloc(s, desired_regs, allocated_regs);
- ts->val_type = TEMP_VAL_REG;
- s->reg_to_temp[ts->reg] = ts;
switch (val_type) {
case TEMP_VAL_CONST:
- ts->mem_coherent = 0;
tcg_out_movi(s, ts->type, ts->reg, ts->val);
+ ts->mem_coherent = 0;
break;
case TEMP_VAL_MEM:
- ts->mem_coherent = 1;
+ if (ts->indirect_reg) {
+ tcg_regset_set_reg(allocated_regs, ts->reg);
+ temp_load(s, ts->mem_base,
+ tcg_target_available_regs[TCG_TYPE_PTR],
+ allocated_regs);
+ }
tcg_out_ld(s, ts->type, ts->reg, ts->mem_base->reg, ts->mem_offset);
+ ts->mem_coherent = 1;
break;
case TEMP_VAL_DEAD:
default:
tcg_abort();
}
+ ts->val_type = TEMP_VAL_REG;
+ s->reg_to_temp[ts->reg] = ts;
}
/* mark a temporary as dead. */
@@ -1696,7 +1718,7 @@ static void temp_sync(TCGContext *s, TCGTemp *ts,
TCGRegSet allocated_regs)
temp_load(s, ts, tcg_target_available_regs[ts->type], allocated_regs);
/* fallthrough*/
case TEMP_VAL_REG:
- tcg_reg_sync(s, ts->reg);
+ tcg_reg_sync(s, ts->reg, allocated_regs);
break;
case TEMP_VAL_DEAD:
case TEMP_VAL_MEM:
@@ -1712,13 +1734,16 @@ static inline void temp_save(TCGContext *s, TCGTemp *ts,
TCGRegSet allocated_regs)
{
#ifdef USE_LIVENESS_ANALYSIS
- /* The liveness analysis already ensures that globals are back
- in memory. Keep an assert for safety. */
- assert(ts->val_type == TEMP_VAL_MEM || ts->fixed_reg);
-#else
+ /* ??? Liveness does not yet incorporate indirect bases. */
+ if (!ts->indirect_base) {
+ /* The liveness analysis already ensures that globals are back
+ in memory. Keep an assert for safety. */
+ assert(ts->val_type == TEMP_VAL_MEM || ts->fixed_reg);
+ return;
+ }
+#endif
temp_sync(s, ts, allocated_regs);
temp_dead(s, ts);
-#endif
}
/* save globals to their canonical location and assume they can be
@@ -1742,13 +1767,17 @@ static void sync_globals(TCGContext *s, TCGRegSet
allocated_regs)
for (i = 0; i < s->nb_globals; i++) {
TCGTemp *ts = &s->temps[i];
+
#ifdef USE_LIVENESS_ANALYSIS
- assert(ts->val_type != TEMP_VAL_REG
- || ts->fixed_reg
- || ts->mem_coherent);
-#else
- temp_sync(s, ts, allocated_regs);
+ /* ??? Liveness does not yet incorporate indirect bases. */
+ if (!ts->indirect_base) {
+ assert(ts->val_type != TEMP_VAL_REG
+ || ts->fixed_reg
+ || ts->mem_coherent);
+ continue;
+ }
#endif
+ temp_sync(s, ts, allocated_regs);
}
}
@@ -1764,12 +1793,15 @@ static void tcg_reg_alloc_bb_end(TCGContext *s,
TCGRegSet allocated_regs)
temp_save(s, ts, allocated_regs);
} else {
#ifdef USE_LIVENESS_ANALYSIS
- /* The liveness analysis already ensures that temps are dead.
- Keep an assert for safety. */
- assert(ts->val_type == TEMP_VAL_DEAD);
-#else
- temp_dead(s, ts);
+ /* ??? Liveness does not yet incorporate indirect bases. */
+ if (!ts->indirect_base) {
+ /* The liveness analysis already ensures that temps are dead.
+ Keep an assert for safety. */
+ assert(ts->val_type == TEMP_VAL_DEAD);
+ continue;
+ }
#endif
+ temp_dead(s, ts);
}
}
@@ -1840,6 +1872,12 @@ static void tcg_reg_alloc_mov(TCGContext *s, const
TCGOpDef *def,
if (!ots->mem_allocated) {
temp_allocate_frame(s, args[0]);
}
+ if (ots->indirect_reg) {
+ tcg_regset_set_reg(allocated_regs, ts->reg);
+ temp_load(s, ots->mem_base,
+ tcg_target_available_regs[TCG_TYPE_PTR],
+ allocated_regs);
+ }
tcg_out_st(s, ots->type, ts->reg, ots->mem_base->reg, ots->mem_offset);
if (IS_DEAD_ARG(1)) {
temp_dead(s, ts);
@@ -1876,7 +1914,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const
TCGOpDef *def,
ots->mem_coherent = 0;
s->reg_to_temp[ots->reg] = ots;
if (NEED_SYNC_ARG(0)) {
- tcg_reg_sync(s, ots->reg);
+ tcg_reg_sync(s, ots->reg, allocated_regs);
}
}
}
@@ -1966,7 +2004,7 @@ static void tcg_reg_alloc_op(TCGContext *s,
/* XXX: permit generic clobber register list ? */
for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
- tcg_reg_free(s, reg);
+ tcg_reg_free(s, reg, allocated_regs);
}
}
}
@@ -2023,7 +2061,7 @@ static void tcg_reg_alloc_op(TCGContext *s,
tcg_out_mov(s, ts->type, ts->reg, reg);
}
if (NEED_SYNC_ARG(i)) {
- tcg_reg_sync(s, reg);
+ tcg_reg_sync(s, reg, allocated_regs);
}
if (IS_DEAD_ARG(i)) {
temp_dead(s, ts);
@@ -2099,7 +2137,7 @@ static int tcg_reg_alloc_call(TCGContext *s, const
TCGOpDef *def,
if (arg != TCG_CALL_DUMMY_ARG) {
ts = &s->temps[arg];
reg = tcg_target_call_iarg_regs[i];
- tcg_reg_free(s, reg);
+ tcg_reg_free(s, reg, allocated_regs);
if (ts->val_type == TEMP_VAL_REG) {
if (ts->reg != reg) {
@@ -2158,7 +2196,7 @@ static int tcg_reg_alloc_call(TCGContext *s, const
TCGOpDef *def,
/* clobber call registers */
for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
- tcg_reg_free(s, reg);
+ tcg_reg_free(s, reg, allocated_regs);
}
}
@@ -2193,7 +2231,7 @@ static int tcg_reg_alloc_call(TCGContext *s, const
TCGOpDef *def,
ts->mem_coherent = 0;
s->reg_to_temp[reg] = ts;
if (NEED_SYNC_ARG(i)) {
- tcg_reg_sync(s, reg);
+ tcg_reg_sync(s, reg, allocated_regs);
}
if (IS_DEAD_ARG(i)) {
temp_dead(s, ts);
diff --git a/tcg/tcg.h b/tcg/tcg.h
index 74649fa..cff86dc 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -399,6 +399,8 @@ typedef struct TCGTemp {
struct TCGTemp *mem_base;
intptr_t mem_offset;
unsigned int fixed_reg:1;
+ unsigned int indirect_reg:1;
+ unsigned int indirect_base:1;
unsigned int mem_coherent:1;
unsigned int mem_allocated:1;
unsigned int temp_local:1; /* If true, the temp is saved across
--
1.8.1.4
- [Qemu-devel] [RFC 04/16] tcg: Compress TCGLabelQemuLdst, (continued)
- [Qemu-devel] [RFC 04/16] tcg: Compress TCGLabelQemuLdst, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 05/16] tcg: More use of TCGReg where appropriate, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 06/16] tcg: Remove tcg_get_arg_str_i32/64, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 07/16] tcg: Change reg_to_temp to TCGTemp pointer, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 08/16] tcg: Change temp_dead argument to TCGTemp, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 09/16] tcg: Change temp_sync argument to TCGTemp, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 10/16] tcg: Change temp_save argument to TCGTemp, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 11/16] tcg: Introduce temp_load, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 12/16] tcg: Tidy temporary allocation, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 13/16] tcg: Use temp_idx, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 14/16] tcg: Implement indirect memory registers,
Richard Henderson <=
- [Qemu-devel] [RFC 15/16] target-sparc: Tidy global register initialization, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 16/16] target-sparc: Use global registers for the register window, Richard Henderson, 2013/09/19
- Re: [Qemu-devel] [RFC 00/16] TCG indirect registers, Max Filippov, 2013/09/22
- Re: [Qemu-devel] [RFC 00/16] TCG indirect registers, Blue Swirl, 2013/09/23