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[Qemu-devel] [PATCH v3 05/11] AARCH64: Add AARCH64 CPU initialization, g
From: |
Mian M. Hamayun |
Subject: |
[Qemu-devel] [PATCH v3 05/11] AARCH64: Add AARCH64 CPU initialization, get and put registers support |
Date: |
Fri, 27 Sep 2013 12:10:08 +0200 |
From: "Mian M. Hamayun" <address@hidden>
The cpu init function tries to initialize with all possible cpu types, as
KVM does not provide a means to detect the real cpu type and simply refuses
to initialize on cpu type mis-match. By using the loop based init function,
we avoid the need to modify code if the underlying platform is different,
such as Fast Models instead of Foundation Models.
Get and Put Registers deal with the basic state of AARCH64 CPUs.
Signed-off-by: Mian M. Hamayun <address@hidden>
---
target-arm/kvm_64.c | 106 ++++++++++++++++++++++++++++++++++++++++++++++++++--
1 file changed, 103 insertions(+), 3 deletions(-)
diff --git a/target-arm/kvm_64.c b/target-arm/kvm_64.c
index a6af968..9685727 100644
--- a/target-arm/kvm_64.c
+++ b/target-arm/kvm_64.c
@@ -18,19 +18,119 @@
#include "sysemu/kvm.h"
#include "kvm_arm.h"
+#define AARCH64_CORE_REG(x) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \
+ KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x))
+
+static uint32_t kvm_arm_targets[KVM_ARM_NUM_TARGETS] = {
+ KVM_ARM_TARGET_AEM_V8,
+ KVM_ARM_TARGET_FOUNDATION_V8,
+ KVM_ARM_TARGET_CORTEX_A57
+};
+
int kvm_arch_init_vcpu(CPUState *cs)
{
- return 0;
+ struct kvm_vcpu_init init;
+ int ret, i;
+
+ memset(init.features, 0, sizeof(init.features));
+ /* Find an appropriate target CPU type.
+ * KVM does not provide means to detect the host CPU type on aarch64,
+ * and simply refuses to initialize, if the CPU type mis-matches;
+ * so we try each possible CPU type on aarch64 before giving up! */
+ for (i = 0; i < KVM_ARM_NUM_TARGETS; ++i) {
+ init.target = kvm_arm_targets[i];
+ ret = kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
+ if (!ret)
+ break;
+ }
+
+ return ret;
}
int kvm_arch_put_registers(CPUState *cs, int level)
{
- return 0;
+ struct kvm_one_reg reg;
+ int i;
+ int ret;
+
+ ARMCPU *cpu = ARM_CPU(cs);
+ CPUARMState *env = &cpu->env;
+
+ for (i = 0; i < ARRAY_SIZE(env->xregs); i++) {
+ reg.id = AARCH64_CORE_REG(regs.regs[i]);
+ reg.addr = (uintptr_t) &env->xregs[i];
+ ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®);
+ if (ret) {
+ return ret;
+ }
+ }
+
+ reg.id = AARCH64_CORE_REG(regs.sp);
+ reg.addr = (uintptr_t) &env->xregs[31];
+ ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®);
+ if (ret) {
+ return ret;
+ }
+
+ reg.id = AARCH64_CORE_REG(regs.pstate);
+ reg.addr = (uintptr_t) &env->pstate;
+ ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®);
+ if (ret) {
+ return ret;
+ }
+
+ reg.id = AARCH64_CORE_REG(regs.pc);
+ reg.addr = (uintptr_t) &env->pc;
+ ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®);
+ if (ret) {
+ return ret;
+ }
+
+ /* TODO: Set Rest of Registers */
+ return ret;
}
int kvm_arch_get_registers(CPUState *cs)
{
- return 0;
+ struct kvm_one_reg reg;
+ int i;
+ int ret;
+
+ ARMCPU *cpu = ARM_CPU(cs);
+ CPUARMState *env = &cpu->env;
+
+ for (i = 0; i < ARRAY_SIZE(env->xregs); i++) {
+ reg.id = AARCH64_CORE_REG(regs.regs[i]);
+ reg.addr = (uintptr_t) &env->xregs[i];
+ ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®);
+ if (ret) {
+ return ret;
+ }
+ }
+
+ reg.id = AARCH64_CORE_REG(regs.sp);
+ reg.addr = (uintptr_t) &env->xregs[31];
+ ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®);
+ if (ret) {
+ return ret;
+ }
+
+ reg.id = AARCH64_CORE_REG(regs.pstate);
+ reg.addr = (uintptr_t) &env->pstate;
+ ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®);
+ if (ret) {
+ return ret;
+ }
+
+ reg.id = AARCH64_CORE_REG(regs.pc);
+ reg.addr = (uintptr_t) &env->pc;
+ ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®);
+ if (ret) {
+ return ret;
+ }
+
+ /* TODO: Set Rest of Registers */
+ return ret;
}
void kvm_arch_reset_vcpu(CPUState *cs)
--
1.8.1.2
- [Qemu-devel] [PATCH v3 00/11] AARCH64 support on machvirt machine model using KVM, Mian M. Hamayun, 2013/09/27
- [Qemu-devel] [PATCH v3 01/11] ARM: arm64 kvm headers from kernel arm64-kvm tree, Mian M. Hamayun, 2013/09/27
- [Qemu-devel] [PATCH v3 02/11] AARCH64: add a57core, Mian M. Hamayun, 2013/09/27
- [Qemu-devel] [PATCH v3 03/11] AARCH64: Add A57 CPU to default AArch64 configuration and enable KVM, Mian M. Hamayun, 2013/09/27
- [Qemu-devel] [PATCH v3 04/11] AARCH64: Separate 32-bit specific code from common KVM hooks, Mian M. Hamayun, 2013/09/27
- [Qemu-devel] [PATCH v3 05/11] AARCH64: Add AARCH64 CPU initialization, get and put registers support,
Mian M. Hamayun <=
- [Qemu-devel] [PATCH v3 06/11] target-arm: Parameterize the bootloader selection and setup mechanism, Mian M. Hamayun, 2013/09/27
- [Qemu-devel] [PATCH v3 07/11] AARCH64: Add boot support for aarch64 processor, Mian M. Hamayun, 2013/09/27
- [Qemu-devel] [PATCH v3 08/11] AARCH64: Enable SMP support for aarch64 processors using PSCI method, Mian M. Hamayun, 2013/09/27
- [Qemu-devel] [PATCH v3 09/11] AARCH64: Enable configure support for 32-bit guests on AARCH64, Mian M. Hamayun, 2013/09/27
- [Qemu-devel] [PATCH v3 10/11] AARCH64: Add flags and boot parameters for 32-bit guests on AARCH64, Mian M. Hamayun, 2013/09/27
- [Qemu-devel] [PATCH v3 11/11] AARCH64: Add 32-bit mode selection parameter, Mian M. Hamayun, 2013/09/27