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Re: [Qemu-devel] [PATCH_v2 9/9] target-openrisc: Correct carry flagcheck
From: |
Alex Bennée |
Subject: |
Re: [Qemu-devel] [PATCH_v2 9/9] target-openrisc: Correct carry flagcheck of l.addc and l.addic test casess |
Date: |
Tue, 22 Oct 2013 17:12:04 +0100 |
User-agent: |
mu4e 0.9.9.6pre2; emacs 24.3.1 |
address@hidden writes:
> On Tue, Oct 22, 2013 at 7:45 PM, Sebastian Macke <address@hidden> wrote:
>> Hi Alex,
>>
>> I am using a cross-compiling toolchain. It's the easiest way as I have to
>> compile the image for QEMU anyhow.
>> http://opencores.org/or1k/OpenRISC_GNU_tool_chain
<snip>
I shall have a look.
>
> It should be possible to use network, I did a quick check at the time of
> openrisc port submission, it used to work.
Nah cross-compiling makes more sense. I was thinking of making configure
detect the various cross compilers at configure time and then optionally
enable each set of tcg tests depending on Cross Compile support.
--
Alex Bennée
- [Qemu-devel] [PATCH_v2 4/9] target-openrisc: Correct wrong epcr register in interrupt handler, (continued)
- [Qemu-devel] [PATCH_v2 4/9] target-openrisc: Correct wrong epcr register in interrupt handler, Sebastian Macke, 2013/10/21
- [Qemu-devel] [PATCH_v2 3/9] target-openrisc: Remove executable flag for every page, Sebastian Macke, 2013/10/21
- [Qemu-devel] [PATCH_v2 6/9] target-openrisc: Correct memory bounds checking for the tlb buffers, Sebastian Macke, 2013/10/21
- [Qemu-devel] [PATCH_v2 7/9] target-openrisc: Separate branch flag from Supervision register, Sebastian Macke, 2013/10/21
- [Qemu-devel] [PATCH_v2 5/9] openrisc-timer: Reduce overhead, Separate clock update functions, Sebastian Macke, 2013/10/21
- [Qemu-devel] [PATCH_v2 8/9] target-openrisc: Complete remove of npc and ppc variables, Sebastian Macke, 2013/10/21
- [Qemu-devel] [PATCH_v2 9/9] target-openrisc: Correct carry flag check of l.addc and l.addic test cases, Sebastian Macke, 2013/10/21
Re: [Qemu-devel] [PATCH_v2 0/9] target-openrisc: Corrections and speed improvements, Jia Liu, 2013/10/22