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Re: [Qemu-devel] [PATCH v4 2/4] hw/intc: add sunxi interrupt controller
From: |
Peter Crosthwaite |
Subject: |
Re: [Qemu-devel] [PATCH v4 2/4] hw/intc: add sunxi interrupt controller device |
Date: |
Wed, 27 Nov 2013 15:31:42 +1000 |
On Wed, Nov 27, 2013 at 1:36 PM, Li Guang <address@hidden> wrote:
> Li Guang wrote:
>>
>> Peter Crosthwaite wrote:
>>>
>>> On Tue, Nov 26, 2013 at 5:22 PM, liguang<address@hidden> wrote:
>>>>
>>>> Signed-off-by: liguang<address@hidden>
>>>> ---
>>>> default-configs/arm-softmmu.mak | 1 +
>>>> hw/intc/Makefile.objs | 1 +
>>>> hw/intc/sunxi-pic.c | 238
>>>> +++++++++++++++++++++++++++++++++++++++
>>>> include/hw/intc/sunxi-pic.h | 20 ++++
>>>> +
>>>> +static void sunxi_pic_set_irq(void *opaque, int irq, int level)
>>>> +{
>>>> + SunxiPICState *s = opaque;
>>>> +
>>>> + if (level) {
>>>> + set_bit(irq, (void *)&s->irq_pending[irq/32]);
>>>
>>> set_bit(irq % 32, ...)
>>>
>>
>> OK
>
>
> No, it is wrong,
> irq/32 is right.
>
The irq/32 is right I agree. This issue is the first arugment.
Shouln't the whole thing be:
set_bit(irq%32, (void *)&s->irq_pending[irq/32]);
Regards,
Peter
[Qemu-devel] [PATCH v4 1/4] hw/timer: add sunxi timer device, liguang, 2013/11/26
[Qemu-devel] [PATCH v4 4/4] MAINTAINERS: add myself to maintain sunxi machine, liguang, 2013/11/26