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[Qemu-devel] [PATCH v2 09/60] target-i386: Remove gen_op_ld_T1_A0
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v2 09/60] target-i386: Remove gen_op_ld_T1_A0 |
Date: |
Fri, 29 Nov 2013 15:59:56 +1300 |
Propagate its definition into all users.
Signed-off-by: Richard Henderson <address@hidden>
---
target-i386/translate.c | 23 +++++++++--------------
1 file changed, 9 insertions(+), 14 deletions(-)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index c64203e..586e5af 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -586,11 +586,6 @@ static inline void gen_op_ld_v(DisasContext *s, int idx,
TCGv t0, TCGv a0)
tcg_gen_qemu_ld_tl(t0, a0, s->mem_index, idx | MO_LE);
}
-static inline void gen_op_ld_T1_A0(DisasContext *s, int idx)
-{
- gen_op_ld_v(s, idx, cpu_T[1], cpu_A0);
-}
-
static inline void gen_op_st_v(DisasContext *s, int idx, TCGv t0, TCGv a0)
{
tcg_gen_qemu_st_tl(t0, a0, s->mem_index, idx | MO_LE);
@@ -1244,7 +1239,7 @@ static inline void gen_lods(DisasContext *s, int ot)
static inline void gen_scas(DisasContext *s, int ot)
{
gen_string_movl_A0_EDI(s);
- gen_op_ld_T1_A0(s, ot);
+ gen_op_ld_v(s, ot, cpu_T[1], cpu_A0);
gen_op(s, OP_CMPL, ot, R_EAX);
gen_op_movl_T0_Dshift(ot);
gen_op_add_reg_T0(s->aflag, R_EDI);
@@ -1253,7 +1248,7 @@ static inline void gen_scas(DisasContext *s, int ot)
static inline void gen_cmps(DisasContext *s, int ot)
{
gen_string_movl_A0_EDI(s);
- gen_op_ld_T1_A0(s, ot);
+ gen_op_ld_v(s, ot, cpu_T[1], cpu_A0);
gen_string_movl_A0_ESI(s);
gen_op(s, OP_CMPL, ot, OR_TMP0);
gen_op_movl_T0_Dshift(ot);
@@ -4834,7 +4829,7 @@ static target_ulong disas_insn(CPUX86State *env,
DisasContext *s,
rm = (modrm & 7) | REX_B(s);
if (mod != 3) {
gen_lea_modrm(env, s, modrm, ®_addr, &offset_addr);
- gen_op_ld_T1_A0(s, ot);
+ gen_op_ld_v(s, ot, cpu_T[1], cpu_A0);
} else if (op == OP_XORL && rm == reg) {
goto xor_zero;
} else {
@@ -5165,7 +5160,7 @@ static target_ulong disas_insn(CPUX86State *env,
DisasContext *s,
gen_eob(s);
break;
case 3: /* lcall Ev */
- gen_op_ld_T1_A0(s, ot);
+ gen_op_ld_v(s, ot, cpu_T[1], cpu_A0);
gen_add_A0_im(s, 1 << (ot - MO_16 + 1));
gen_op_ld_v(s, MO_16, cpu_T[0], cpu_A0);
do_lcall:
@@ -5191,7 +5186,7 @@ static target_ulong disas_insn(CPUX86State *env,
DisasContext *s,
gen_eob(s);
break;
case 5: /* ljmp Ev */
- gen_op_ld_T1_A0(s, ot);
+ gen_op_ld_v(s, ot, cpu_T[1], cpu_A0);
gen_add_A0_im(s, 1 << (ot - MO_16 + 1));
gen_op_ld_v(s, MO_16, cpu_T[0], cpu_A0);
do_ljmp:
@@ -5356,7 +5351,7 @@ static target_ulong disas_insn(CPUX86State *env,
DisasContext *s,
} else {
gen_lea_modrm(env, s, modrm, ®_addr, &offset_addr);
gen_op_mov_TN_reg(ot, 0, reg);
- gen_op_ld_T1_A0(s, ot);
+ gen_op_ld_v(s, ot, cpu_T[1], cpu_A0);
gen_op_addl_T0_T1();
gen_op_st_T0_A0(s, ot);
gen_op_mov_reg_T1(ot, reg);
@@ -5842,7 +5837,7 @@ static target_ulong disas_insn(CPUX86State *env,
DisasContext *s,
/* for xchg, lock is implicit */
if (!(prefixes & PREFIX_LOCK))
gen_helper_lock();
- gen_op_ld_T1_A0(s, ot);
+ gen_op_ld_v(s, ot, cpu_T[1], cpu_A0);
gen_op_st_T0_A0(s, ot);
if (!(prefixes & PREFIX_LOCK))
gen_helper_unlock();
@@ -5873,7 +5868,7 @@ static target_ulong disas_insn(CPUX86State *env,
DisasContext *s,
if (mod == 3)
goto illegal_op;
gen_lea_modrm(env, s, modrm, ®_addr, &offset_addr);
- gen_op_ld_T1_A0(s, ot);
+ gen_op_ld_v(s, ot, cpu_T[1], cpu_A0);
gen_add_A0_im(s, 1 << (ot - MO_16 + 1));
/* load the segment first to handle exceptions properly */
gen_op_ld_v(s, MO_16, cpu_T[0], cpu_A0);
@@ -7679,7 +7674,7 @@ static target_ulong disas_insn(CPUX86State *env,
DisasContext *s,
gen_svm_check_intercept(s, pc_start,
op==2 ? SVM_EXIT_GDTR_WRITE :
SVM_EXIT_IDTR_WRITE);
gen_lea_modrm(env, s, modrm, ®_addr, &offset_addr);
- gen_op_ld_T1_A0(s, MO_16);
+ gen_op_ld_v(s, MO_16, cpu_T[1], cpu_A0);
gen_add_A0_im(s, 2);
gen_op_ld_v(s, CODE64(s) + MO_32, cpu_T[0], cpu_A0);
if (!s->dflag)
--
1.8.3.1
- [Qemu-devel] [PATCH v2 00/60] target-i386 improvements, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 01/60] exec: Delay CPU_LOG_TB_CPU until we actually execute a TB, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 02/60] target-i386: Push DisasContext into load/store helpers, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 03/60] target-i386: Stop encoding DisasContext.mem_index, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 04/60] target-i386: Use new tcg_gen_qemu_ld_* helpers, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 05/60] target-i386: Use new tcg_gen_qemu_st_* helpers, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 06/60] target-i386: Replace OT_* constants with MO_* constants, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 07/60] target-i386: Remove gen_op_ld_T0_A0, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 08/60] target-i386: Remove gen_op_ldu_T0_A0, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 09/60] target-i386: Remove gen_op_ld_T1_A0,
Richard Henderson <=
- [Qemu-devel] [PATCH v2 10/60] target-i386: Remove gen_op_lds_T0_A0, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 11/60] target-i386: Introduce gen_op_st_rm_T0_A0, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 12/60] target-i386: Remove gen_op_st_T0_A0, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 13/60] target-i386: Remove gen_op_st_T1_A0, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 14/60] target-i386: Fix typo in gen_push_T1, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 15/60] target-i386: Tidy mov[sz][bw], Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 16/60] target-i386: Tidy movsl, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 17/60] target-i386: Remove unused arguments to gen_lea_modrm, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 18/60] target-i386: Use MO_BE for movbe, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 19/60] target-i386: Tidy gen_op_mov_TN_reg+tcg_gen_trunc_tl_i32, Richard Henderson, 2013/11/28