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[Qemu-devel] [PATCH v3 2/2] target-i386: MSR_IA32_BNDCFGS handle
From: |
Liu, Jinsong |
Subject: |
[Qemu-devel] [PATCH v3 2/2] target-i386: MSR_IA32_BNDCFGS handle |
Date: |
Fri, 6 Dec 2013 14:20:03 +0000 |
>From 12fa3564b7342c4e034b13671dc922ff23ac4b1e Mon Sep 17 00:00:00 2001
From: Liu Jinsong <address@hidden>
Date: Sat, 7 Dec 2013 05:18:35 +0800
Subject: [PATCH v3 2/2] target-i386: MSR_IA32_BNDCFGS handle
Signed-off-by: Liu Jinsong <address@hidden>
---
target-i386/cpu.h | 3 +++
target-i386/kvm.c | 14 ++++++++++++++
target-i386/machine.c | 7 ++++++-
3 files changed, 23 insertions(+), 1 deletions(-)
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index c28b901..bbec228 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -380,6 +380,8 @@
#define MSR_VM_HSAVE_PA 0xc0010117
+#define MSR_IA32_BNDCFGS 0x00000d90
+
#define XSTATE_FP (1ULL << 0)
#define XSTATE_SSE (1ULL << 1)
#define XSTATE_YMM (1ULL << 2)
@@ -928,6 +930,7 @@ typedef struct CPUX86State {
XMMReg ymmh_regs[CPU_NB_REGS];
BNDReg bnd_regs[4];
BNDCSReg bndcs_regs;
+ uint64_t msr_bndcfgs;
uint64_t xcr0;
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index ff913ff..01ebca2 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -69,6 +69,7 @@ static bool has_msr_feature_control;
static bool has_msr_async_pf_en;
static bool has_msr_pv_eoi_en;
static bool has_msr_misc_enable;
+static bool has_msr_bndcfgs;
static bool has_msr_kvm_steal_time;
static int lm_capable_kernel;
@@ -772,6 +773,10 @@ static int kvm_get_supported_msrs(KVMState *s)
has_msr_misc_enable = true;
continue;
}
+ if (kvm_msr_list->indices[i] == MSR_IA32_BNDCFGS) {
+ has_msr_bndcfgs = true;
+ continue;
+ }
}
}
@@ -1214,6 +1219,9 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
kvm_msr_entry_set(&msrs[n++], MSR_IA32_FEATURE_CONTROL,
env->msr_ia32_feature_control);
}
+ if (has_msr_bndcfgs) {
+ kvm_msr_entry_set(&msrs[n++], MSR_IA32_BNDCFGS, env->msr_bndcfgs);
+ }
}
if (env->mcg_cap) {
int i;
@@ -1445,6 +1453,9 @@ static int kvm_get_msrs(X86CPU *cpu)
if (has_msr_feature_control) {
msrs[n++].index = MSR_IA32_FEATURE_CONTROL;
}
+ if (has_msr_bndcfgs) {
+ msrs[n++].index = MSR_IA32_BNDCFGS;
+ }
if (!env->tsc_valid) {
msrs[n++].index = MSR_IA32_TSC;
@@ -1560,6 +1571,9 @@ static int kvm_get_msrs(X86CPU *cpu)
case MSR_IA32_FEATURE_CONTROL:
env->msr_ia32_feature_control = msrs[i].data;
break;
+ case MSR_IA32_BNDCFGS:
+ env->msr_bndcfgs = msrs[i].data;
+ break;
default:
if (msrs[i].index >= MSR_MC0_CTL &&
msrs[i].index < MSR_MC0_CTL + (env->mcg_cap & 0xff) * 4) {
diff --git a/target-i386/machine.c b/target-i386/machine.c
index ceab51b..2de1964 100644
--- a/target-i386/machine.c
+++ b/target-i386/machine.c
@@ -533,7 +533,11 @@ static bool mpx_needed(void *opaque)
}
}
- return env->bndcs_regs.cfgu || env->bndcs_regs.sts;
+ if (env->bndcs_regs.cfgu || env->bndcs_regs.sts) {
+ return true;
+ }
+
+ return !!env->msr_bndcfgs;
}
static const VMStateDescription vmstate_mpx = {
@@ -545,6 +549,7 @@ static const VMStateDescription vmstate_mpx = {
VMSTATE_BND_REGS(env.bnd_regs, X86CPU, 4),
VMSTATE_UINT64(env.bndcs_regs.cfgu, X86CPU),
VMSTATE_UINT64(env.bndcs_regs.sts, X86CPU),
+ VMSTATE_UINT64(env.msr_bndcfgs, X86CPU),
VMSTATE_END_OF_LIST()
}
};
--
1.7.1
0002-target-i386-MSR_IA32_BNDCFGS-handle.patch
Description: 0002-target-i386-MSR_IA32_BNDCFGS-handle.patch
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