[Qemu-devel] [PATCH v3 4/4] tcg/optimize: add known-zero bits compute for load ops

[Aurelien Jarno]

Cc: Richard Henderson <address@hidden>
Cc: Paolo Bonzini <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
---
 tcg/optimize.c |   33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/tcg/optimize.c b/tcg/optimize.c
index e14b564..db2b079 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -783,6 +783,39 @@ static TCGArg *tcg_constant_folding(TCGContext *s, 
uint16_t *tcg_opc_ptr,
             mask = temps[args[3]].mask | temps[args[4]].mask;
             break;
 
+        CASE_OP_32_64(ld8u):
+        case INDEX_op_qemu_ld8u:
+            mask = 0xff;
+            break;
+        CASE_OP_32_64(ld16u):
+        case INDEX_op_qemu_ld16u:
+            mask = 0xffff;
+            break;
+        case INDEX_op_ld32u_i64:
+        case INDEX_op_qemu_ld32u:
+            mask = 0xffffffffu;
+            break;
+
+        case INDEX_op_qemu_ld_i32:
+        case INDEX_op_qemu_ld_i64:
+            {
+                const TCGMemOp opc = args[def->nb_oargs + def->nb_iargs];
+                if (!(opc & MO_SIGN)) {
+                    switch (opc & MO_SIZE) {
+                    case MO_8:
+                        mask = 0xff;
+                        break;
+                    case MO_16:
+                        mask = 0xffff;
+                        break;
+                    case MO_32:
+                        mask = 0xffffffffu;
+                        break;
+                    }
+                }
+            }
+            break;
+
         default:
             break;
         }
-- 
1.7.10.4