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[Qemu-devel] [PATCH 3/5] target-s390: Simplify op_cs, op_soc, op_stm
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 3/5] target-s390: Simplify op_cs, op_soc, op_stm |
Date: |
Wed, 11 Dec 2013 11:30:45 -0800 |
Unifying 2 different code paths each.
Signed-off-by: Richard Henderson <address@hidden>
---
target-s390x/translate.c | 28 +++++++---------------------
1 file changed, 7 insertions(+), 21 deletions(-)
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index 8f8567e..3e88c23 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -1818,7 +1818,7 @@ static ExitStatus op_cs(DisasContext *s, DisasOps *o)
/* FIXME: needs an atomic solution for CONFIG_USER_ONLY. */
int d2 = get_field(s->fields, d2);
int b2 = get_field(s->fields, b2);
- int is_64 = s->insn->data;
+ TCGMemOp mop = s->insn->data ? MO_BEQ : MO_BEUL;
TCGv_i64 addr, mem, cc, z;
/* Note that in1 = R3 (new value) and
@@ -1828,11 +1828,7 @@ static ExitStatus op_cs(DisasContext *s, DisasOps *o)
about moving the memory to R1 on inequality, if we include equality it
means that R1 is equal to the memory in all conditions. */
addr = get_address(s, 0, b2, d2);
- if (is_64) {
- tcg_gen_qemu_ld_i64(o->out, addr, get_mem_index(s), MO_BEQ);
- } else {
- tcg_gen_qemu_ld_i64(o->out, addr, get_mem_index(s), MO_BEUL);
- }
+ tcg_gen_qemu_ld_i64(o->out, addr, get_mem_index(s), mop);
/* Are the memory and expected values (un)equal? Note that this setcond
produces the output CC value, thus the NE sense of the test. */
@@ -1846,11 +1842,7 @@ static ExitStatus op_cs(DisasContext *s, DisasOps *o)
z = tcg_const_i64(0);
mem = tcg_temp_new_i64();
tcg_gen_movcond_i64(TCG_COND_EQ, mem, cc, z, o->in1, o->out);
- if (is_64) {
- tcg_gen_qemu_st_i64(mem, addr, get_mem_index(s), MO_BEQ);
- } else {
- tcg_gen_qemu_st_i64(mem, addr, get_mem_index(s), MO_BEUL);
- }
+ tcg_gen_qemu_st_i64(mem, addr, get_mem_index(s), mop);
tcg_temp_free_i64(z);
tcg_temp_free_i64(mem);
tcg_temp_free_i64(addr);
@@ -2986,6 +2978,7 @@ static ExitStatus op_sigp(DisasContext *s, DisasOps *o)
static ExitStatus op_soc(DisasContext *s, DisasOps *o)
{
+ TCGMemOp mop = s->insn->data ? MO_BEQ : MO_BEUL;
DisasCompare c;
TCGv_i64 a;
int lab, r1;
@@ -3002,11 +2995,7 @@ static ExitStatus op_soc(DisasContext *s, DisasOps *o)
r1 = get_field(s->fields, r1);
a = get_address(s, 0, get_field(s->fields, b2), get_field(s->fields, d2));
- if (s->insn->data) {
- tcg_gen_qemu_st_i64(regs[r1], a, get_mem_index(s), MO_BEQ);
- } else {
- tcg_gen_qemu_st_i64(regs[r1], a, get_mem_index(s), MO_BEUL);
- }
+ tcg_gen_qemu_st_i64(regs[r1], a, get_mem_index(s), mop);
tcg_temp_free_i64(a);
gen_set_label(lab);
@@ -3387,14 +3376,11 @@ static ExitStatus op_stm(DisasContext *s, DisasOps *o)
int r1 = get_field(s->fields, r1);
int r3 = get_field(s->fields, r3);
int size = s->insn->data;
+ TCGMemOp mop = size == 8 ? MO_BEQ : MO_BEUL;
TCGv_i64 tsize = tcg_const_i64(size);
while (1) {
- if (size == 8) {
- tcg_gen_qemu_st_i64(regs[r1], o->in2, get_mem_index(s), MO_BEQ);
- } else {
- tcg_gen_qemu_st_i64(regs[r1], o->in2, get_mem_index(s), MO_BEUL);
- }
+ tcg_gen_qemu_st_i64(regs[r1], o->in2, get_mem_index(s), mop);
if (r1 == r3) {
break;
}
--
1.8.3.1
- [Qemu-devel] [PATCH 0/5] target-s390: Use the new qemu_ld/st opcodes, Richard Henderson, 2013/12/11
- [Qemu-devel] [PATCH 1/5] target-s390: Convert to new qemu_ld/st opcodes, Richard Henderson, 2013/12/11
- [Qemu-devel] [PATCH 2/5] target-s390: Simplify op_clc, Richard Henderson, 2013/12/11
- [Qemu-devel] [PATCH 3/5] target-s390: Simplify op_cs, op_soc, op_stm,
Richard Henderson <=
- [Qemu-devel] [PATCH 5/5] target-s390: Use little-endian ops for LOAD/STORE REVERSED, Richard Henderson, 2013/12/11
- [Qemu-devel] [PATCH 4/5] target-s390: Simplify op_icm, op_stcm, Richard Henderson, 2013/12/11
- Re: [Qemu-devel] [PATCH 0/5] target-s390: Use the new qemu_ld/st opcodes, Alexander Graf, 2013/12/12