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[Qemu-devel] [PATCH v1 16/22] exec: Make stl_phys_notdirty input an Addr
From: |
edgar . iglesias |
Subject: |
[Qemu-devel] [PATCH v1 16/22] exec: Make stl_phys_notdirty input an AddressSpace |
Date: |
Mon, 16 Dec 2013 18:06:04 +1000 |
From: "Edgar E. Iglesias" <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
---
exec.c | 4 ++--
hw/arm/boot.c | 9 +++++----
hw/arm/highbank.c | 6 +++---
include/exec/cpu-common.h | 2 +-
target-i386/helper.c | 16 ++++++++--------
target-sparc/mmu_helper.c | 2 +-
6 files changed, 20 insertions(+), 19 deletions(-)
diff --git a/exec.c b/exec.c
index 1dfdc3c..0b92ec1 100644
--- a/exec.c
+++ b/exec.c
@@ -2496,14 +2496,14 @@ uint32_t lduw_be_phys(AddressSpace *as, hwaddr addr)
/* warning: addr must be aligned. The ram page is not masked as dirty
and the code inside is not invalidated. It is useful if the dirty
bits are used to track modified PTEs */
-void stl_phys_notdirty(hwaddr addr, uint32_t val)
+void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val)
{
uint8_t *ptr;
MemoryRegion *mr;
hwaddr l = 4;
hwaddr addr1;
- mr = address_space_translate(&address_space_memory, addr, &addr1, &l,
+ mr = address_space_translate(as, addr, &addr1, &l,
true);
if (l < 4 || !memory_access_is_direct(mr, true)) {
io_mem_write(mr, addr1, val, 4);
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index 55d552f..b04d386 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -16,6 +16,7 @@
#include "elf.h"
#include "sysemu/device_tree.h"
#include "qemu/config-file.h"
+#include "exec/address-spaces.h"
#define KERNEL_ARGS_ADDR 0x100
#define KERNEL_LOAD_ADDR 0x00010000
@@ -88,13 +89,13 @@ static void default_reset_secondary(ARMCPU *cpu,
{
CPUARMState *env = &cpu->env;
- stl_phys_notdirty(info->smp_bootreg_addr, 0);
+ stl_phys_notdirty(&address_space_memory, info->smp_bootreg_addr, 0);
env->regs[15] = info->smp_loader_start;
}
-#define WRITE_WORD(p, value) do { \
- stl_phys_notdirty(p, value); \
- p += 4; \
+#define WRITE_WORD(p, value) do { \
+ stl_phys_notdirty(&address_space_memory, p, value); \
+ p += 4; \
} while (0)
static void set_kernel_args(const struct arm_boot_info *info)
diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c
index fe98ef1..2e95967 100644
--- a/hw/arm/highbank.c
+++ b/hw/arm/highbank.c
@@ -68,11 +68,11 @@ static void hb_reset_secondary(ARMCPU *cpu, const struct
arm_boot_info *info)
switch (info->nb_cpus) {
case 4:
- stl_phys_notdirty(SMP_BOOT_REG + 0x30, 0);
+ stl_phys_notdirty(&address_space_memory, SMP_BOOT_REG + 0x30, 0);
case 3:
- stl_phys_notdirty(SMP_BOOT_REG + 0x20, 0);
+ stl_phys_notdirty(&address_space_memory, SMP_BOOT_REG + 0x20, 0);
case 2:
- stl_phys_notdirty(SMP_BOOT_REG + 0x10, 0);
+ stl_phys_notdirty(&address_space_memory, SMP_BOOT_REG + 0x10, 0);
env->regs[15] = SMP_BOOT_ADDR;
break;
default:
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index b29065d..dd5feab 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -102,7 +102,7 @@ void stq_be_phys(AddressSpace *as, hwaddr addr, uint64_t
val);
uint32_t lduw_phys(AddressSpace *as, hwaddr addr);
uint32_t ldl_phys(AddressSpace *as, hwaddr addr);
uint64_t ldq_phys(AddressSpace *as, hwaddr addr);
-void stl_phys_notdirty(hwaddr addr, uint32_t val);
+void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val);
void stw_phys(hwaddr addr, uint32_t val);
void stl_phys(AddressSpace *as, hwaddr addr, uint32_t val);
void stq_phys(AddressSpace *as, hwaddr addr, uint64_t val);
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 27461f1..114acb7 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -567,7 +567,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong
addr,
}
if (!(pml4e & PG_ACCESSED_MASK)) {
pml4e |= PG_ACCESSED_MASK;
- stl_phys_notdirty(pml4e_addr, pml4e);
+ stl_phys_notdirty(env->as, pml4e_addr, pml4e);
}
ptep = pml4e ^ PG_NX_MASK;
pdpe_addr = ((pml4e & PHYS_ADDR_MASK) + (((addr >> 30) & 0x1ff) <<
3)) &
@@ -584,7 +584,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong
addr,
ptep &= pdpe ^ PG_NX_MASK;
if (!(pdpe & PG_ACCESSED_MASK)) {
pdpe |= PG_ACCESSED_MASK;
- stl_phys_notdirty(pdpe_addr, pdpe);
+ stl_phys_notdirty(env->as, pdpe_addr, pdpe);
}
} else
#endif
@@ -654,7 +654,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong
addr,
pde |= PG_ACCESSED_MASK;
if (is_dirty)
pde |= PG_DIRTY_MASK;
- stl_phys_notdirty(pde_addr, pde);
+ stl_phys_notdirty(env->as, pde_addr, pde);
}
/* align to page_size */
pte = pde & ((PHYS_ADDR_MASK & ~(page_size - 1)) | 0xfff);
@@ -663,7 +663,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong
addr,
/* 4 KB page */
if (!(pde & PG_ACCESSED_MASK)) {
pde |= PG_ACCESSED_MASK;
- stl_phys_notdirty(pde_addr, pde);
+ stl_phys_notdirty(env->as, pde_addr, pde);
}
pte_addr = ((pde & PHYS_ADDR_MASK) + (((addr >> 12) & 0x1ff) <<
3)) &
env->a20_mask;
@@ -716,7 +716,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong
addr,
pte |= PG_ACCESSED_MASK;
if (is_dirty)
pte |= PG_DIRTY_MASK;
- stl_phys_notdirty(pte_addr, pte);
+ stl_phys_notdirty(env->as, pte_addr, pte);
}
page_size = 4096;
virt_addr = addr & ~0xfff;
@@ -771,7 +771,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong
addr,
pde |= PG_ACCESSED_MASK;
if (is_dirty)
pde |= PG_DIRTY_MASK;
- stl_phys_notdirty(pde_addr, pde);
+ stl_phys_notdirty(env->as, pde_addr, pde);
}
pte = pde & ~( (page_size - 1) & ~0xfff); /* align to page_size */
@@ -780,7 +780,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong
addr,
} else {
if (!(pde & PG_ACCESSED_MASK)) {
pde |= PG_ACCESSED_MASK;
- stl_phys_notdirty(pde_addr, pde);
+ stl_phys_notdirty(env->as, pde_addr, pde);
}
/* page directory entry */
@@ -828,7 +828,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong
addr,
pte |= PG_ACCESSED_MASK;
if (is_dirty)
pte |= PG_DIRTY_MASK;
- stl_phys_notdirty(pte_addr, pte);
+ stl_phys_notdirty(env->as, pte_addr, pte);
}
page_size = 4096;
virt_addr = addr & ~0xfff;
diff --git a/target-sparc/mmu_helper.c b/target-sparc/mmu_helper.c
index 8c5986e..d82410f 100644
--- a/target-sparc/mmu_helper.c
+++ b/target-sparc/mmu_helper.c
@@ -179,7 +179,7 @@ static int get_physical_address(CPUSPARCState *env, hwaddr
*physical,
if (is_dirty) {
pde |= PG_MODIFIED_MASK;
}
- stl_phys_notdirty(pde_ptr, pde);
+ stl_phys_notdirty(env->as, pde_ptr, pde);
}
/* the page can be put in the TLB */
--
1.7.10.4
- Re: [Qemu-devel] [PATCH v1 08/22] cpu: Add per-cpu address space, (continued)
- [Qemu-devel] [PATCH v1 09/22] target-microblaze: Add address-space property, edgar . iglesias, 2013/12/16
- [Qemu-devel] [PATCH v1 10/22] exec: On AS changes, only flush affected CPU TLBs, edgar . iglesias, 2013/12/16
- [Qemu-devel] [PATCH v1 11/22] exec: Make ldl_*_phys input an AddressSpace, edgar . iglesias, 2013/12/16
- [Qemu-devel] [PATCH v1 12/22] exec: Make ldq/ldub_*_phys input an AddressSpace, edgar . iglesias, 2013/12/16
- [Qemu-devel] [PATCH v1 13/22] exec: Make lduw_*_phys input an AddressSpace, edgar . iglesias, 2013/12/16
- [Qemu-devel] [PATCH v1 14/22] exec: Make stq_*_phys input an AddressSpace, edgar . iglesias, 2013/12/16
- [Qemu-devel] [PATCH v1 15/22] exec: Make stl_*_phys input an AddressSpace, edgar . iglesias, 2013/12/16
- [Qemu-devel] [PATCH v1 16/22] exec: Make stl_phys_notdirty input an AddressSpace,
edgar . iglesias <=
- [Qemu-devel] [PATCH v1 17/22] exec: Make stw_*_phys input an AddressSpace, edgar . iglesias, 2013/12/16
- [Qemu-devel] [PATCH v1 18/22] exec: Make stb_phys input an AddressSpace, edgar . iglesias, 2013/12/16
- [Qemu-devel] [PATCH v1 19/22] exec: Make cpu_physical_memory_write_rom input an AS, edgar . iglesias, 2013/12/16
- [Qemu-devel] [PATCH v1 20/22] exec: Make cpu_memory_rw_debug use the CPUs AS, edgar . iglesias, 2013/12/16
- [Qemu-devel] [PATCH v1 21/22] petalogix-ml605: Create the CPU with object_new(), edgar . iglesias, 2013/12/16
- [Qemu-devel] [PATCH v1 22/22] petalogix-ml605: Make the LMB visible only to the CPU, edgar . iglesias, 2013/12/16