qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-devel] [PATCH 00/22] A64 decoder patchset 6: rest of floating poin


From: Peter Maydell
Subject: [Qemu-devel] [PATCH 00/22] A64 decoder patchset 6: rest of floating point
Date: Tue, 31 Dec 2013 13:35:36 +0000

This patchset completes the FP emulation, leaving us with only
Neon (and CRC32) to go to complete the user-mode emulation.
Most of this is fixing issues and adding new features to softfloat.
(As usual, all Linaro authored softfloat patches are licensed under
either softfloat-2a or softfloat-2b, at your option.)
We need Tom Musta's softfloat patches too, so I have included them
here. Note that two of these still have outstanding issues identified
in code review : see the notes in their commit messages (and I haven't
applied my signed-off-by line to them).

This patchset sits on top of the previous ones; you can find a git tree at
 git://git.linaro.org/people/peter.maydell/qemu-arm.git a64-sixth-set
web UI:
 
https://git.linaro.org/people/peter.maydell/qemu-arm.git/shortlog/refs/heads/a64-sixth-set

New Year's Resolution for 2014: avoid using the phrase "yeah,
sure, we can get that done by the end of the year".

thanks
-- PMM

Alexander Graf (1):
  target-arm: A64: Add "Floating-point<->fixed-point" instructions

Peter Maydell (11):
  softfloat: Fix exception flag handling for float32_to_float16()
  softfloat: Add 16 bit integer to float conversions
  softfloat: Only raise Invalid when conversions to int are out of range
  softfloat: Fix factor 2 error for scalbn on denormal inputs
  softfloat: Provide complete set of accessors for fp state
  softfloat: Factor out RoundAndPackFloat16 and
    NormalizeFloat16Subnormal
  softfloat: Add float16 <=> float64 conversion functions
  softfloat: Add support for ties-away rounding
  target-arm: Ignore most exceptions from scalbn when doing fixpoint
    conversion
  target-arm: A64: Add 1-source 32-to-32 and 64-to-64 FP instructions
  target-arm: A64: Add support for FCVT between half, single and double

Tom Musta (5):
  softfloat: Fix float64_to_uint64
  softfloat: Add float32_to_uint64()
  softfloat: Fix float64_to_uint64_round_to_zero
  softfloat: Fix float64_to_uint32
  softfloat: Fix float64_to_uint32_round_to_zero

Will Newton (5):
  softfloat: Add float to 16bit integer conversions.
  target-arm: Prepare VFP_CONV_FIX helpers for A64 uses
  target-arm: Rename A32 VFP conversion helpers
  target-arm: A64: Add extra VFP fixed point conversion helpers
  target-arm: A64: Add floating-point<->integer conversion instructions

 fpu/softfloat.c            | 660 +++++++++++++++++++++++++++++++++++----------
 include/fpu/softfloat.h    |  66 ++++-
 target-arm/helper.c        | 141 ++++++++--
 target-arm/helper.h        |  25 ++
 target-arm/translate-a64.c | 424 ++++++++++++++++++++++++++++-
 target-arm/translate.c     |  24 +-
 6 files changed, 1162 insertions(+), 178 deletions(-)

-- 
1.8.5




reply via email to

[Prev in Thread] Current Thread [Next in Thread]