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Re: [Qemu-devel] [PATCH 06/10] target-arm: A64: Add SIMD ZIP/UZP/TRN
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 06/10] target-arm: A64: Add SIMD ZIP/UZP/TRN |
Date: |
Fri, 10 Jan 2014 11:29:14 -0800 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.2.0 |
On 01/10/2014 09:12 AM, Peter Maydell wrote:
> + for (i = 0; i < elements; i++) {
> + switch (opcode) {
> + case 1: /* UZP1/2 */
> + {
> + int midpoint = elements / 2;
> + if (i < midpoint) {
> + read_vec_element(s, tcg_res, rn, 2 * i + part, size);
> + } else {
> + read_vec_element(s, tcg_res, rm,
> + 2 * (i - midpoint) + part, size);
> + }
> + break;
> + }
You're generating up to 16 * 3 + 2 = 50 opcodes here. I do wonder if it
wouldn't be better to implement these as helpers. But,
Reviewed-by: Richard Henderson <address@hidden>
r~
- [Qemu-devel] [PATCH 00/10] A64 SIMD patchset one: ld/st, C3.6.1..C3.6.7, Peter Maydell, 2014/01/10
- [Qemu-devel] [PATCH 08/10] target-arm: A64: Add SIMD copy operations, Peter Maydell, 2014/01/10
- [Qemu-devel] [PATCH 06/10] target-arm: A64: Add SIMD ZIP/UZP/TRN, Peter Maydell, 2014/01/10
- Re: [Qemu-devel] [PATCH 06/10] target-arm: A64: Add SIMD ZIP/UZP/TRN,
Richard Henderson <=
- [Qemu-devel] [PATCH 10/10] target-arm: A64: Add SIMD scalar copy instructions, Peter Maydell, 2014/01/10
- [Qemu-devel] [PATCH 02/10] target-arm: A64: Add SIMD ld/st single, Peter Maydell, 2014/01/10
- [Qemu-devel] [PATCH 09/10] target-arm: A64: Add SIMD modified immediate group, Peter Maydell, 2014/01/10
- [Qemu-devel] [PATCH 05/10] target-arm: A64: Add SIMD TBL/TBLX, Peter Maydell, 2014/01/10