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| From: | Peter Maydell |
| Subject: | Re: [Qemu-devel] [PATCH target-arm v5 3/5] zynq_slcr: Implement CPU reset |
| Date: | Mon, 27 Jan 2014 17:43:12 +0000 |
On 15 January 2014 09:14, Peter Crosthwaite <address@hidden> wrote: > Implement the CPU reset IO line of the A9_CPU_RST_CTRL register > (offset 0x244). This is trivial GPIO mapping straight to the register > bits. > > Signed-off-by: Peter Crosthwaite <address@hidden> Reviewed-by: Peter Maydell <address@hidden> thanks -- PMM
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