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Re: [Qemu-devel] [PATCHv2 1/2] sun4m: Add Sun CG3 framebuffer and corres


From: Bob Breuer
Subject: Re: [Qemu-devel] [PATCHv2 1/2] sun4m: Add Sun CG3 framebuffer and corresponding OpenBIOS FCode ROM
Date: Mon, 17 Feb 2014 10:18:28 -0600
User-agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:24.0) Gecko/20100101 Thunderbird/24.3.0

On 2/17/2014 6:50 AM, Mark Cave-Ayland wrote:
> On 14/02/14 14:54, Peter Crosthwaite wrote:
> 
>>> The short answer is "we don't know" because we don't have any
>>> documentation.
>>
>> Sigh.... This has happened quite a lot lately.
>>
>> If the kernel driver has macros, re-use them as much as possible. If
>> you have a vague idea on whats, what, a few well invented names would
>> help the device self-documentation.
> 
> Okay. I now have a revised version which borrows macro names from the
> Linux and BSD drivers which I think should be more readable. I'll post
> the revised version to the list shortly.
> 
>>>> Your hander switch statements stride in 4, are you only doing this for
>>>> your one exception case of that one-byte big-endian access I commented
>>>> earlier.
>>>
>>>
>>> Yes, that is correct.
>>>
>>
>> Should you trap misaligned accesses then?
> 
> Over the weekend I found out that the non-BT458 accesses (addr >= 0x10)
> are done as byte accesses and so byte accesses do need to be allowed to
> these registers. My interpretation of reading the SBus documentation is
> that on real hardware the bus converts accesses for you, and so I don't
> think a trap would be suitable here. Also I've not found an image (yet)
> that attempts bad accesses in this way across my OpenBIOS ISO test suite...


When you create the memory region for the registers, try this:

    .endianness = DEVICE_BIG_ENDIAN,
    .impl = {
        .min_access_size = 1,
        .max_access_size = 1,
    },

and ignore the bottom 2 address bits for the DAC accesses.

QEMU should then break any 32-bit accesses down to the correct 8-bit
accesses.

Bob




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