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[Qemu-devel] [PULL 30/30] linux-user: AArch64: Fix exclusive store of th
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 30/30] linux-user: AArch64: Fix exclusive store of the zero register |
Date: |
Thu, 20 Feb 2014 11:17:34 +0000 |
From: Janne Grunau <address@hidden>
Signed-off-by: Janne Grunau <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
linux-user/main.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/linux-user/main.c b/linux-user/main.c
index cabc9e1..9192977 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -953,7 +953,8 @@ static int do_strex_a64(CPUARMState *env)
goto finish;
}
}
- val = env->xregs[rt];
+ /* handle the zero register */
+ val = rt == 31 ? 0 : env->xregs[rt];
switch (size) {
case 0:
segv = put_user_u8(val, addr);
@@ -972,7 +973,8 @@ static int do_strex_a64(CPUARMState *env)
goto error;
}
if (is_pair) {
- val = env->xregs[rt2];
+ /* handle the zero register */
+ val = rt2 == 31 ? 0 : env->xregs[rt2];
if (size == 2) {
segv = put_user_u32(val, addr + 4);
} else {
--
1.8.5
- [Qemu-devel] [PULL 00/30] target-arm queue, Peter Maydell, 2014/02/20
- [Qemu-devel] [PULL 10/30] target-arm/kvm-consts.h: Define QEMU constants for known KVM CPUs, Peter Maydell, 2014/02/20
- [Qemu-devel] [PULL 09/30] target-arm: A64: Implement remaining 3-same instructions, Peter Maydell, 2014/02/20
- [Qemu-devel] [PULL 16/30] target-arm: Split cpreg access checks out from read/write functions, Peter Maydell, 2014/02/20
- [Qemu-devel] [PULL 30/30] linux-user: AArch64: Fix exclusive store of the zero register,
Peter Maydell <=
- [Qemu-devel] [PULL 29/30] target-arm: A64: Implement unprivileged load/store, Peter Maydell, 2014/02/20
- [Qemu-devel] [PULL 28/30] target-arm: A64: Implement narrowing three-reg-diff operations, Peter Maydell, 2014/02/20
- [Qemu-devel] [PULL 27/30] target-arm: A64: Implement the wide 3-reg-different operations, Peter Maydell, 2014/02/20
- [Qemu-devel] [PULL 07/30] target-arm: A64: Implement floating point pairwise insns, Peter Maydell, 2014/02/20
- [Qemu-devel] [PULL 26/30] target-arm: A64: Add most remaining three-reg-diff widening ops, Peter Maydell, 2014/02/20
- [Qemu-devel] [PULL 25/30] target-arm: A64: Add opcode comments to disas_simd_three_reg_diff, Peter Maydell, 2014/02/20
- [Qemu-devel] [PULL 24/30] target-arm: A64: Implement store-exclusive for system mode, Peter Maydell, 2014/02/20
- [Qemu-devel] [PULL 23/30] target-arm: Fix incorrect type for value argument to write_raw_cp_reg, Peter Maydell, 2014/02/20
- [Qemu-devel] [PULL 22/30] target-arm: Remove failure status return from read/write_raw_cp_reg, Peter Maydell, 2014/02/20
- [Qemu-devel] [PULL 20/30] target-arm: Drop success/fail return from cpreg read and write functions, Peter Maydell, 2014/02/20