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Re: [Qemu-devel] [Aarch64] Bug in add/sub extended reg
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [Aarch64] Bug in add/sub extended reg |
Date: |
Thu, 20 Feb 2014 12:25:25 +0000 |
On 20 February 2014 11:51, Laurent Desnogues
<address@hidden> wrote:
> Hello,
>
> there's a bug in SP handling in disas_add_sub_ext_reg:
>
> /* non-flag setting ops may use SP */
> if (!setflags) {
> tcg_rn = read_cpu_reg_sp(s, rn, sf);
> tcg_rd = cpu_reg_sp(s, rd);
> } else {
> tcg_rn = read_cpu_reg(s, rn, sf);
> tcg_rd = cpu_reg(s, rd);
> }
>
> rn can always be SP no matter whether flags are set or not.
Yep, pseudocode agrees:
bits(datasize) operand1 = if n == 31 then SP[] else X[n];
It's only Rd that has this "31 means SP only if
we're not setting flags" behaviour.
thanks
-- PMM