[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 080/130] target-ppc: add extended opcodes for dcbt/dc
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PULL 080/130] target-ppc: add extended opcodes for dcbt/dcbtst |
Date: |
Fri, 7 Mar 2014 00:33:27 +0100 |
From: Cédric Le Goater <address@hidden>
The latest glibc provides a memrchr routine using an extended opcode
of the 'dcbt' instruction :
00000000000a7cc0 <memrchr>:
a7cc0: 11 00 4c 3c addis r2,r12,17
a7cc4: b8 f8 42 38 addi r2,r2,-1864
a7cc8: 14 2a e3 7c add r7,r3,r5
a7ccc: d0 00 07 7c neg r0,r7
a7cd0: ff ff e7 38 addi r7,r7,-1
a7cd4: 78 1b 6a 7c mr r10,r3
a7cd8: 24 06 e6 78 rldicr r6,r7,0,56
a7cdc: 60 00 20 39 li r9,96
a7ce0: 2c 32 09 7e dcbtt r9,r6
....
which breaks grep, and other commands, in TCG mode :
invalid bits: 02000000 for opcode: 1f - 16 - 08 (7e09322c) 00003fff799feca0
This patch adds the extended opcodes for dcbt/dcbtst as no-ops just
like the 'dcbt' instruction.
Signed-off-by: Cédric Le Goater <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 951f15e..8885490 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -9596,8 +9596,8 @@ GEN_HANDLER(mtspr, 0x1F, 0x13, 0x0E, 0x00000001,
PPC_MISC),
GEN_HANDLER(dcbf, 0x1F, 0x16, 0x02, 0x03C00001, PPC_CACHE),
GEN_HANDLER(dcbi, 0x1F, 0x16, 0x0E, 0x03E00001, PPC_CACHE),
GEN_HANDLER(dcbst, 0x1F, 0x16, 0x01, 0x03E00001, PPC_CACHE),
-GEN_HANDLER(dcbt, 0x1F, 0x16, 0x08, 0x02000001, PPC_CACHE),
-GEN_HANDLER(dcbtst, 0x1F, 0x16, 0x07, 0x02000001, PPC_CACHE),
+GEN_HANDLER(dcbt, 0x1F, 0x16, 0x08, 0x00000001, PPC_CACHE),
+GEN_HANDLER(dcbtst, 0x1F, 0x16, 0x07, 0x00000001, PPC_CACHE),
GEN_HANDLER(dcbz, 0x1F, 0x16, 0x1F, 0x03C00001, PPC_CACHE_DCBZ),
GEN_HANDLER(dst, 0x1F, 0x16, 0x0A, 0x01800001, PPC_ALTIVEC),
GEN_HANDLER(dstst, 0x1F, 0x16, 0x0B, 0x02000001, PPC_ALTIVEC),
--
1.8.1.4
- [Qemu-devel] [PULL 060/130] target-ppc: Add ISA 2.06 stbcx. and sthcx. Instructions, (continued)
- [Qemu-devel] [PULL 060/130] target-ppc: Add ISA 2.06 stbcx. and sthcx. Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 072/130] PPC: KVM: suppress warnings about not supported SPRs, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 077/130] spapr: print more detailed error message on failed load_elf(), Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 066/130] target-ppc: Add ISA 2.06 ftdiv Instruction, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 063/130] target-ppc: Add ISA 2.06 fcfid[u][s] Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 059/130] target-ppc: Add ISA2.06 lbarx, lharx Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 074/130] spapr: support only ELF kernel images, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 062/130] target-ppc: Add ISA2.06 Float to Integer Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 076/130] elf-loader: add more return codes, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 075/130] moxie: fix load_elf() usage, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 080/130] target-ppc: add extended opcodes for dcbt/dcbtst,
Alexander Graf <=
- [Qemu-devel] [PULL 081/130] target-ppc: Fix xxpermdi When T==A or T==B, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 083/130] target-ppc: Add Target Address SPR (TAR) to Power8, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 078/130] target-ppc: Update external_htab even when HTAB is managed by kernel, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 079/130] qdev: Keep global allocation counter per bus, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 082/130] target-ppc: Add Flag for bctar, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 084/130] target-ppc: Add bctar Instruction, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 085/130] target-ppc: Add Flag for ISA 2.07 Load/Store Quadword Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 073/130] Add Enhanced Three-Speed Ethernet Controller (eTSEC), Alexander Graf, 2014/03/06