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[Qemu-devel] [PULL 38/51] timer: cadence_ttc: Fix match register write l
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 38/51] timer: cadence_ttc: Fix match register write logic |
Date: |
Thu, 17 Apr 2014 11:33:53 +0100 |
From: Peter Crosthwaite <address@hidden>
This switch logic should not fall through. Fix.
Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/timer/cadence_ttc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/timer/cadence_ttc.c b/hw/timer/cadence_ttc.c
index a279bce..28cb328 100644
--- a/hw/timer/cadence_ttc.c
+++ b/hw/timer/cadence_ttc.c
@@ -346,11 +346,13 @@ static void cadence_ttc_write(void *opaque, hwaddr offset,
case 0x34:
case 0x38:
s->reg_match[0] = value & 0xffff;
+ break;
case 0x3c: /* match register */
case 0x40:
case 0x44:
s->reg_match[1] = value & 0xffff;
+ break;
case 0x48: /* match register */
case 0x4c:
--
1.9.1
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- [Qemu-devel] [PULL 38/51] timer: cadence_ttc: Fix match register write logic,
Peter Maydell <=
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- [Qemu-devel] [PULL 40/51] allwinner-a10-pic: fix behaviour of pending register, Peter Maydell, 2014/04/17