[Qemu-devel] [PATCH v2 00/13] tcg/sparc v8plus code generation

[Richard Henderson]

Our 32-bit build for sparc has been requiring a 64-bit capable chip
for about 2 years now, by way of requiring move-conditional and LE
memory instructions.  But we've mostly been generating 32-bit code
otherwise.

This patch set changes things so that we make full use of the cpu.

The sparcv8plus code model requires that 64-bit data be kept only
in the %g and %o registers.  These are saved by the kernel in full
64-bit slots somewhere.  Whereas the %i and %l registers are saved
via the register window mechanism, and as part of the 32-bit ABI
we've only allocated 32-bits of stack for storing these.  Since the
register window can roll at any time, due to signals and interrupts,
we must consider the high bits of %i and %l to be garbage.

This implies that we must treat 32-bit and 64-bit quantities differently.
For the most part, TCG is good with that.  The one case where that falls
down, however, is when we frob data between widths.  Thus the addition
of the trunc_shr_i32 opcode.

This new opcode, or something like it, would have been required if
we ever got around to supporting MIPS64 code generation, where 32-bit
quantities must remain sign-extended in the 64-bit register at all times.

In the case of sparcv8plus, we can get what we need out of the opcode
merely by setting its register constraints properly.

---
Changed v1-v2:
  * Renamed the trunc_i32 opcode based on feedback from Stuart Brady,
    though I didn't use the full trunc_shr_i64_i32 name he suggested.
  * Dropped patch 13/14, as that's now handled with a change to pass
    a TCGType to tcg_target_const_match, now on mainline.


r~


Richard Henderson (13):
  tcg: Fix missed pointer size != TCG_TARGET_REG_BITS changes
  tcg: Add INDEX_op_trunc_shr_i32
  tcg-sparc: Remove most uses of TCG_TARGET_REG_BITS
  tcg-sparc: Support trunc_shr_i32
  tcg-sparc: Use 64-bit registers with sparcv8plus
  tcg-sparc: Use the RETURN instruction
  tcg-sparc: Implement muls2_i32
  tcg-sparc: Tidy check_fit_* tests
  tcg-sparc: Don't handle mov/movi in tcg_out_op
  tcg-sparc: Hoist common argument loads in tcg_out_op
  tcg-sparc: Fixup function argument types
  tcg-sparc: Fix small 32-bit movi
  tcg-sparc: Accept stores of zero

 include/exec/def-helper.h |   2 +-
 tcg/README                |   5 +
 tcg/aarch64/tcg-target.h  |   1 +
 tcg/i386/tcg-target.h     |   1 +
 tcg/ia64/tcg-target.h     |   1 +
 tcg/optimize.c            |  16 +
 tcg/ppc64/tcg-target.h    |   1 +
 tcg/s390/tcg-target.h     |   1 +
 tcg/sparc/tcg-target.c    | 842 +++++++++++++++++++---------------------------
 tcg/sparc/tcg-target.h    |  17 +-
 tcg/tcg-op.h              |  54 ++-
 tcg/tcg-opc.h             |   4 +
 tcg/tcg.c                 |  80 ++++-
 tcg/tcg.h                 |   1 +
 tcg/tci/tcg-target.h      |   1 +
 15 files changed, 498 insertions(+), 529 deletions(-)

-- 
1.9.0