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[Qemu-devel] [PATCH v1 00/16] target-arm: Parts of the AArch64 EL2/3 exc
From: |
Edgar E. Iglesias |
Subject: |
[Qemu-devel] [PATCH v1 00/16] target-arm: Parts of the AArch64 EL2/3 exception model |
Date: |
Fri, 30 May 2014 17:28:15 +1000 |
From: "Edgar E. Iglesias" <address@hidden>
Hi,
This is a second round of AArch64 EL2/3 patches working on the exception
model. Among other things adding HVC/SMC, interrupt routing to EL2/3 and
Virtual IRQs/FIQs. The VIRQ/VFIQ support only adds the external signal
delivery method.
Patch 3 is a bug fix.
Patch 14 fails checkpatch, seems like a bug in checkpatch, CC:d Blue.
This conflicts slightly with the PSCI emulation patches that Rob posted.
A rebase should be trivial, hooking in the PSCI emulation calls in the
HVC/SMC helpers.
Cheers,
Edgar
Edgar E. Iglesias (16):
target-arm: A64: Break out aarch64_save/restore_sp
target-arm: A64: Respect SPSEL in ERET SP restore
target-arm: A64: Respect SPSEL when taking exceptions
target-arm: Make far_el1 an array
target-arm: Add ESR_EL2 and 3
target-arm: Add FAR_EL2 and 3
target-arm: Add HCR_EL2
target-arm: Add SCR_EL3
target-arm: A64: Refactor aarch64_cpu_do_interrupt
target-arm: Break out exception masking to a separate func
target-arm: Don't take interrupts targeting lower ELs
target-arm: A64: Correct updates to FAR and ESR on exceptions
target-arm: A64: Emulate the HVC insn
target-arm: A64: Emulate the SMC insn
target-arm: Add IRQ and FIQ routing to EL2 and 3
target-arm: Add support for VIRQ and VFIQ
cpu-exec.c | 17 +++++-
target-arm/cpu.c | 22 +++++++-
target-arm/cpu.h | 116 +++++++++++++++++++++++++++++++++++++-
target-arm/helper-a64.c | 32 ++++++-----
target-arm/helper.c | 137 +++++++++++++++++++++++++++++++++++++++++++--
target-arm/helper.h | 2 +
target-arm/internals.h | 43 +++++++++++---
target-arm/kvm64.c | 13 +----
target-arm/op_helper.c | 40 +++++++++++--
target-arm/translate-a64.c | 31 ++++++++--
10 files changed, 395 insertions(+), 58 deletions(-)
--
1.8.3.2
- [Qemu-devel] [PATCH v1 00/16] target-arm: Parts of the AArch64 EL2/3 exception model,
Edgar E. Iglesias <=
- [Qemu-devel] [PATCH v1 01/16] target-arm: A64: Break out aarch64_save/restore_sp, Edgar E. Iglesias, 2014/05/30
- [Qemu-devel] [PATCH v1 02/16] target-arm: A64: Respect SPSEL in ERET SP restore, Edgar E. Iglesias, 2014/05/30
- [Qemu-devel] [PATCH v1 03/16] target-arm: A64: Respect SPSEL when taking exceptions, Edgar E. Iglesias, 2014/05/30
- [Qemu-devel] [PATCH v1 04/16] target-arm: Make far_el1 an array, Edgar E. Iglesias, 2014/05/30
- [Qemu-devel] [PATCH v1 05/16] target-arm: Add ESR_EL2 and 3, Edgar E. Iglesias, 2014/05/30
- [Qemu-devel] [PATCH v1 06/16] target-arm: Add FAR_EL2 and 3, Edgar E. Iglesias, 2014/05/30
- [Qemu-devel] [PATCH v1 07/16] target-arm: Add HCR_EL2, Edgar E. Iglesias, 2014/05/30
- [Qemu-devel] [PATCH v1 08/16] target-arm: Add SCR_EL3, Edgar E. Iglesias, 2014/05/30