[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 18/18] target-alpha: Remove DNOD bit from FPCR
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 18/18] target-alpha: Remove DNOD bit from FPCR |
Date: |
Wed, 9 Jul 2014 09:20:34 -0700 |
It was never implemented, thus even for EV6 and EV7 the bit
is read-as-zero, writes-ignored.
Reported-by: Al Viro <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target-alpha/cpu.h | 1 -
target-alpha/helper.c | 8 +++-----
2 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index d9b861f..d3a6a4e 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -246,7 +246,6 @@ struct CPUAlphaState {
uint8_t fpcr_exc_mask;
uint8_t fpcr_dyn_round;
uint8_t fpcr_flush_to_zero;
- uint8_t fpcr_dnod;
uint8_t fpcr_undz;
/* The Internal Processor Registers. Some of these we assume always
diff --git a/target-alpha/helper.c b/target-alpha/helper.c
index 26d5188..d0b4964 100644
--- a/target-alpha/helper.c
+++ b/target-alpha/helper.c
@@ -88,19 +88,17 @@ uint64_t cpu_alpha_load_fpcr (CPUAlphaState *env)
if (env->fp_status.flush_inputs_to_zero) {
r |= FPCR_DNZ;
}
- if (env->fpcr_dnod) {
- r |= FPCR_DNOD;
- }
if (env->fpcr_undz) {
r |= FPCR_UNDZ;
}
+ /* DNOD was never implemented in hardware. */
return r;
}
void cpu_alpha_store_fpcr (CPUAlphaState *env, uint64_t val)
{
- uint8_t t;
+ int t;
t = 0;
if (val & FPCR_INV) {
@@ -157,11 +155,11 @@ void cpu_alpha_store_fpcr (CPUAlphaState *env, uint64_t
val)
}
env->fpcr_dyn_round = t;
- env->fpcr_dnod = (val & FPCR_DNOD) != 0;
env->fpcr_undz = (val & FPCR_UNDZ) != 0;
env->fp_status.flush_inputs_to_zero = (val & FPCR_DNZ) != 0;
env->fpcr_flush_to_zero
= (val & (FPCR_UNDZ | FPCR_UNFD)) == (FPCR_UNDZ | FPCR_UNFD);
+ /* DNOD was never implemented in hardware. */
}
uint64_t helper_load_fpcr(CPUAlphaState *env)
--
1.9.3
- [Qemu-devel] [PULL 08/18] target-alpha: Fix cvttq vs inf, (continued)
- [Qemu-devel] [PULL 08/18] target-alpha: Fix cvttq vs inf, Richard Henderson, 2014/07/09
- Re: [Qemu-devel] [PULL for-2.1 00/18] target-alpha patch queue, Peter Maydell, 2014/07/09
- [Qemu-devel] [PULL 10/18] target-alpha: Implement WH64EN, Richard Henderson, 2014/07/09
- [Qemu-devel] [PULL 04/18] target-alpha: Set fpcr_exc_status even for disabled exceptions, Richard Henderson, 2014/07/09
- [Qemu-devel] [PULL 02/18] target-alpha: Set PC correctly for floating-point exceptions, Richard Henderson, 2014/07/09
- [Qemu-devel] [PULL 16/18] target-alpha: Rename fcvtql, Richard Henderson, 2014/07/09
- [Qemu-devel] [PULL 15/18] target-alpha: Raise IOV from CVTQL, Richard Henderson, 2014/07/09
- [Qemu-devel] [PULL 11/18] target-alpha: Disallow literal operand to 1C.30 to 1C.37, Richard Henderson, 2014/07/09
- [Qemu-devel] [PULL 17/18] target-alpha: Fix fpcr_flush_to_zero initialization, Richard Henderson, 2014/07/09
- [Qemu-devel] [PULL 18/18] target-alpha: Remove DNOD bit from FPCR,
Richard Henderson <=
- [Qemu-devel] [PULL 09/18] target-alpha: Fix integer overflow checking insns, Richard Henderson, 2014/07/10
- [Qemu-devel] [PULL 05/18] target-alpha: Set EXC_M_SWC for exceptions from /S insns, Richard Henderson, 2014/07/10
- [Qemu-devel] [PULL 14/18] target-alpha: Suppress underflow from CVTTQ if DNZ, Richard Henderson, 2014/07/10
- [Qemu-devel] [PULL 13/18] target-alpha: Raise EXC_M_INV properly for fp inputs, Richard Henderson, 2014/07/10
- [Qemu-devel] [PULL 01/18] target-alpha: Forget installed round mode after MT_FPCR, Richard Henderson, 2014/07/10
- [Qemu-devel] [PULL 12/18] target-alpha: Ignore the unused fp_status exceptions, Richard Henderson, 2014/07/10
- [Qemu-devel] [PULL 03/18] target-alpha: Store IOV exception in fp_status, Richard Henderson, 2014/07/10