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Re: [Qemu-devel] [PATCH 08/12] pci: allow 0 address for PCI IO regions
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH 08/12] pci: allow 0 address for PCI IO regions |
Date: |
Tue, 26 Aug 2014 12:55:28 +0100 |
On 26 August 2014 10:14, Alexey Kardashevskiy <address@hidden> wrote:
> On 08/19/2014 10:21 AM, Michael Roth wrote:
>> Some kernels program a 0 address for io regions. PCI 3.0 spec
>> section 6.2.5.1 doesn't seem to disallow this.
>
>
> I remember there was discussion about it but I forgot :)
I think the conclusion we came to was that there may have been
a note in the PCI 2.1 spec that implied that 0 addresses meant
"disabled" but this seems to have gone from later versions,
suggesting it was erroneous.
Personally I'm happy for us to remove the "0 means disabled"
check, but I'd prefer it if we do it consistently for both IO and
MMIO regions -- this patch only changes the IO BAR code.
thanks
-- PMM
- Re: [Qemu-devel] [PATCH 02/12] spapr_pci: populate DRC dt entries for PHBs, (continued)
- [Qemu-devel] [PATCH 04/12] spapr_pci: add set-indicator RTAS interface, Michael Roth, 2014/08/18
- [Qemu-devel] [PATCH 06/12] spapr_pci: add get-sensor-state RTAS interface, Michael Roth, 2014/08/18
- [Qemu-devel] [PATCH 05/12] spapr_pci: add get/set-power-level RTAS interfaces, Michael Roth, 2014/08/18
- [Qemu-devel] [PATCH 07/12] spapr_pci: add ibm, configure-connector RTAS interface, Michael Roth, 2014/08/18
- [Qemu-devel] [PATCH 08/12] pci: allow 0 address for PCI IO regions, Michael Roth, 2014/08/18
[Qemu-devel] [PATCH 01/12] spapr: populate DRC entries for root dt node, Michael Roth, 2014/08/18