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[Qemu-devel] [PULL 14/19] target-arm: A64: Correct updates to FAR and ES
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 14/19] target-arm: A64: Correct updates to FAR and ESR on exceptions |
Date: |
Mon, 29 Sep 2014 19:26:48 +0100 |
From: "Edgar E. Iglesias" <address@hidden>
Not all exception types update both FAR and ESR.
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Greg Bellows <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/helper-a64.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c
index 4be0784..c6ef8e9 100644
--- a/target-arm/helper-a64.c
+++ b/target-arm/helper-a64.c
@@ -466,18 +466,17 @@ void aarch64_cpu_do_interrupt(CPUState *cs)
env->exception.syndrome);
}
- env->cp15.esr_el[new_el] = env->exception.syndrome;
- env->cp15.far_el[new_el] = env->exception.vaddress;
-
switch (cs->exception_index) {
case EXCP_PREFETCH_ABORT:
case EXCP_DATA_ABORT:
+ env->cp15.far_el[new_el] = env->exception.vaddress;
qemu_log_mask(CPU_LOG_INT, "...with FAR 0x%" PRIx64 "\n",
env->cp15.far_el[new_el]);
- break;
+ /* fall through */
case EXCP_BKPT:
case EXCP_UDEF:
case EXCP_SWI:
+ env->cp15.esr_el[new_el] = env->exception.syndrome;
break;
case EXCP_IRQ:
addr += 0x80;
--
1.9.1
- [Qemu-devel] [PULL 15/19] target-arm: A64: Emulate the HVC insn, (continued)
- [Qemu-devel] [PULL 15/19] target-arm: A64: Emulate the HVC insn, Peter Maydell, 2014/09/29
- [Qemu-devel] [PULL 12/19] target-arm: Break out exception masking to a separate func, Peter Maydell, 2014/09/29
- [Qemu-devel] [PULL 07/19] hw/input/tsc210x.c: Delete unused array tsc2101_rates, Peter Maydell, 2014/09/29
- [Qemu-devel] [PULL 06/19] hw/display/pxa2xx_lcd.c: Remove unused function pxa2xx_dma_rdst_set, Peter Maydell, 2014/09/29
- [Qemu-devel] [PULL 04/19] hw/display/blizzard.c: Delete unused function blizzard_rgb2yuv, Peter Maydell, 2014/09/29
- [Qemu-devel] [PULL 19/19] target-arm: Add support for VIRQ and VFIQ, Peter Maydell, 2014/09/29
- [Qemu-devel] [PULL 03/19] configure: Build GDB XML for 32 bit ARM CPUs into qemu aarch64 binaries, Peter Maydell, 2014/09/29
- [Qemu-devel] [PULL 05/19] hw/intc/imx_avic.c: Remove unused function imx_avic_set_prio(), Peter Maydell, 2014/09/29
- [Qemu-devel] [PULL 16/19] target-arm: Add a Hypervisor Trap exception type, Peter Maydell, 2014/09/29
- [Qemu-devel] [PULL 08/19] target-arm: Don't handle c15_cpar changes via tb_flush(), Peter Maydell, 2014/09/29
- [Qemu-devel] [PULL 14/19] target-arm: A64: Correct updates to FAR and ESR on exceptions,
Peter Maydell <=
- [Qemu-devel] [PULL 13/19] target-arm: Don't take interrupts targeting lower ELs, Peter Maydell, 2014/09/29
- [Qemu-devel] [PULL 10/19] target-arm: Add SCR_EL3, Peter Maydell, 2014/09/29
- [Qemu-devel] [PULL 01/19] target-arm: Implement setting guest breakpoints, Peter Maydell, 2014/09/29
- [Qemu-devel] [PULL 11/19] target-arm: A64: Refactor aarch64_cpu_do_interrupt, Peter Maydell, 2014/09/29
- [Qemu-devel] [PULL 09/19] target-arm: Add HCR_EL2, Peter Maydell, 2014/09/29
- [Qemu-devel] [PULL 02/19] target-arm: Implement handling of breakpoint firing, Peter Maydell, 2014/09/29
- Re: [Qemu-devel] [PULL 00/19] target-arm queue, Peter Maydell, 2014/09/30