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Re: [Qemu-devel] [PATCH v2 4/5] target-tricore: Add instructions of BIT


From: Richard Henderson
Subject: Re: [Qemu-devel] [PATCH v2 4/5] target-tricore: Add instructions of BIT opcode format
Date: Wed, 01 Oct 2014 08:51:39 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.1.1

On 10/01/2014 02:35 AM, Bastian Koppelmann wrote:
> +    case OPC2_32_BIT_AND_NOR_T:
> +#if defined TCG_TARGET_HAS_nor_i32
> +        gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],
> +                    pos1, pos2, &tcg_gen_nor_tl, &tcg_gen_and_tl);
> +#else

These are *always* defined.  You want a normal C if test.

That said, I would actually write it the other way:

   if (TCG_TARGET_HAS_andc_i32) {
       gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],
                   pos1, pos2, &tcg_gen_or_tl, &tcg_gen_andc_tl);
   } else {
       gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],
                   pos1, pos2, &tcg_gen_nor_tl, &tcg_gen_and_tl);
   }

so that the "normal" case is the one that matches the opcode name.


r~



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