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Re: [Qemu-devel] [PATCH v6 04/32] target-arm: rename arm_current_pl to a
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v6 04/32] target-arm: rename arm_current_pl to arm_current_el |
Date: |
Mon, 13 Oct 2014 15:00:11 +0200 |
On 10 October 2014 18:03, Greg Bellows <address@hidden> wrote:
> Renamed the arm_current_pl CPU function to more accurately represent that it
> returns the ARMv8 EL rather than ARMv7 PL.
>
> Signed-off-by: Greg Bellows <address@hidden>
>
> ==========
>
> v5 -> v6
> - Renamed DisasContext current_pl field to current_el
> - Added comment to arm_current_el on handling v7 PL
> - Fixed comments referencing PL
> ---
> target-arm/cpu.h | 27 +++++++++++++++------------
> target-arm/helper-a64.c | 6 +++---
> target-arm/helper.c | 22 +++++++++++-----------
> target-arm/internals.h | 2 +-
> target-arm/op_helper.c | 16 ++++++++--------
> target-arm/translate-a64.c | 16 ++++++++--------
> target-arm/translate.c | 4 ++--
> target-arm/translate.h | 4 ++--
> 8 files changed, 50 insertions(+), 47 deletions(-)
>
> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> index 4f6db0f..149f258 100644
> --- a/target-arm/cpu.h
> +++ b/target-arm/cpu.h
> @@ -986,7 +986,10 @@ static inline bool cptype_valid(int cptype)
> #define PL1_RW (PL1_R | PL1_W)
> #define PL0_RW (PL0_R | PL0_W)
>
> -static inline int arm_current_pl(CPUARMState *env)
> +/* Return the current Exception Level (as per ARMv8 note that this differs
Needs a semicolon between "ARMv8" and "note".
> + * from the ARMv7 Privilege Level).
> + */
> +static inline int arm_current_el(CPUARMState *env)
Otherwise
Reviewed-by: Peter Maydell <address@hidden>
thanks
-- PMM
- [Qemu-devel] [PATCH v6 00/32] target-arm: add Security Extensions for CPUs, Greg Bellows, 2014/10/10
- [Qemu-devel] [PATCH v6 02/32] target-arm: add arm_is_secure() function, Greg Bellows, 2014/10/10
- [Qemu-devel] [PATCH v6 03/32] target-arm: reject switching to monitor mode, Greg Bellows, 2014/10/10
- [Qemu-devel] [PATCH v6 01/32] target-arm: increase arrays of registers R13 & R14, Greg Bellows, 2014/10/10
- [Qemu-devel] [PATCH v6 05/32] target-arm: make arm_current_el() return EL3, Greg Bellows, 2014/10/10
- [Qemu-devel] [PATCH v6 04/32] target-arm: rename arm_current_pl to arm_current_el, Greg Bellows, 2014/10/10
- Re: [Qemu-devel] [PATCH v6 04/32] target-arm: rename arm_current_pl to arm_current_el,
Peter Maydell <=
- [Qemu-devel] [PATCH v6 06/32] target-arm: A32: Emulate the SMC instruction, Greg Bellows, 2014/10/10
[Qemu-devel] [PATCH v6 08/32] target-arm: add async excp target_el function, Greg Bellows, 2014/10/10
[Qemu-devel] [PATCH v6 07/32] target-arm: extend async excp masking, Greg Bellows, 2014/10/10
[Qemu-devel] [PATCH v6 10/32] target-arm: add non-secure Translation Block flag, Greg Bellows, 2014/10/10
[Qemu-devel] [PATCH v6 09/32] target-arm: add banked register accessors, Greg Bellows, 2014/10/10
[Qemu-devel] [PATCH v6 11/32] target-arm: add CPREG secure state support, Greg Bellows, 2014/10/10