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Re: [Qemu-devel] [PATCH v2 02/20] target-mips: add MSA exceptions
From: |
James Hogan |
Subject: |
Re: [Qemu-devel] [PATCH v2 02/20] target-mips: add MSA exceptions |
Date: |
Wed, 29 Oct 2014 09:56:44 +0000 |
User-agent: |
Mutt/1.5.22 (2013-10-16) |
On Wed, Oct 29, 2014 at 01:41:50AM +0000, Yongbok Kim wrote:
> add MSA exceptions
>
> Signed-off-by: Yongbok Kim <address@hidden>
Reviewed-by: James Hogan <address@hidden>
Cheers
James
> ---
> target-mips/helper.c | 10 ++++++++++
> 1 files changed, 10 insertions(+), 0 deletions(-)
>
> diff --git a/target-mips/helper.c b/target-mips/helper.c
> index c92b25c..3a93c20 100644
> --- a/target-mips/helper.c
> +++ b/target-mips/helper.c
> @@ -426,6 +426,8 @@ static const char * const excp_names[EXCP_LAST + 1] = {
> [EXCP_CACHE] = "cache error",
> [EXCP_TLBXI] = "TLB execute-inhibit",
> [EXCP_TLBRI] = "TLB read-inhibit",
> + [EXCP_MSADIS] = "MSA disabled",
> + [EXCP_MSAFPE] = "MSA floating point",
> };
>
> target_ulong exception_resume_pc (CPUMIPSState *env)
> @@ -667,6 +669,10 @@ void mips_cpu_do_interrupt(CPUState *cs)
> cause = 13;
> update_badinstr = 1;
> goto set_EPC;
> + case EXCP_MSAFPE:
> + cause = 14;
> + update_badinstr = 1;
> + goto set_EPC;
> case EXCP_FPE:
> cause = 15;
> update_badinstr = 1;
> @@ -681,6 +687,10 @@ void mips_cpu_do_interrupt(CPUState *cs)
> case EXCP_TLBXI:
> cause = 20;
> goto set_EPC;
> + case EXCP_MSADIS:
> + cause = 21;
> + update_badinstr = 1;
> + goto set_EPC;
> case EXCP_MDMX:
> cause = 22;
> goto set_EPC;
> --
> 1.7.4
>
>
- [Qemu-devel] [PATCH v2 00/20] target-mips: add MSA module, Yongbok Kim, 2014/10/28
- [Qemu-devel] [PATCH v2 02/20] target-mips: add MSA exceptions, Yongbok Kim, 2014/10/28
- Re: [Qemu-devel] [PATCH v2 02/20] target-mips: add MSA exceptions,
James Hogan <=
- [Qemu-devel] [PATCH v2 01/20] target-mips: add MSA defines and data structure, Yongbok Kim, 2014/10/28
- [Qemu-devel] [PATCH v2 03/20] target-mips: remove duplicated mips/ieee mapping function, Yongbok Kim, 2014/10/28
- [Qemu-devel] [PATCH v2 05/20] target-mips: stop translation after ctc1, Yongbok Kim, 2014/10/28
- [Qemu-devel] [PATCH v2 04/20] target-mips: add 16, 64 bit load and store, Yongbok Kim, 2014/10/28