Re: [Qemu-devel] [PATCH v8 13/27] target-arm: add SCTLR_EL3 and make SCTLR banked

[Peter Maydell]

On 31 October 2014 21:51, Greg Bellows <address@hidden> wrote:
> Not sure of the exact reasoning as I inherited the change.  However, when I
> went through this code before I took it that the change was needed to filter
> out the case where SCTLR may be either of the ARMv8 variants (SCTLR_EL1 or
> SCTLR_EL3) as neither of them have a SCTLR_V bits.  In fact, looking quickly
> through the ARMv8 ARM, I don't see any mention of hivec support for AArch64.
>
> I think the more appropriate check in this case is to check whether the
> current EL is 32-bit instead of ARMv8.   Made this change in v9 along with a
> comment.

You don't need any extra check, for two reasons:
 (1) if our EL out of reset is 64 bit then this is SCTLR_EL3 or
 SCTLR_EL1, and in either case the V bit is RES0 so it will always
 be zero
 (2) setting env->regs[15] is harmless anyway because the AArch64
 PC is stored elsewhere

thanks
-- PMM