Re: [Qemu-devel] [PATCH] target-mips: fix for missing delay slot in BC1EQZ and BC1NEZ

[Yongbok Kim]

On 06/11/2014 10:29, Leon Alrae wrote:
> New R6 COP1 conditional branches currently don't have delay slot. Fixing this
> by setting MIPS_HFLAG_BDS32 flag which is required for branches having 4-byte
> delay slot.
>
> Signed-off-by: Leon Alrae <address@hidden>
> ---
>   target-mips/translate.c | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/target-mips/translate.c b/target-mips/translate.c
> index 2117ce8..e83c50a 100644
> --- a/target-mips/translate.c
> +++ b/target-mips/translate.c
> @@ -8104,6 +8104,7 @@ static void gen_compute_branch1_r6(DisasContext *ctx, 
> uint32_t op,
>       MIPS_DEBUG("%s: cond %02x target " TARGET_FMT_lx, opn,
>                  ctx->hflags, btarget);
>       ctx->btarget = btarget;
> +    ctx->hflags |= MIPS_HFLAG_BDS32;
>   
>   out:
>       tcg_temp_free_i64(t0);

Reviewed-by: Yongbok Kim <address@hidden>

Regards,
Yongbok Kim