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Re: [Qemu-devel] [PATCH v3 4/4] serial: only resample THR interrupt on r
From: |
Dr. David Alan Gilbert |
Subject: |
Re: [Qemu-devel] [PATCH v3 4/4] serial: only resample THR interrupt on rising edge of IER.THRI |
Date: |
Mon, 15 Dec 2014 16:05:38 +0000 |
User-agent: |
Mutt/1.5.23 (2014-03-12) |
* Paolo Bonzini (address@hidden) wrote:
> There is disagreement on whether LSR.THRE should be resampled when
> IER.THRI goes from 1 to 1. Bochs only does it if IER.THRI goes from 0
> to 1; PCE does it even if IER.THRI is unchanged. But the Windows driver
> seems to always go from 1 to 0 and back to 1, so do things in agreement
> with Bochs, because the handling of thr_ipending was reported in 2010
> (https://lists.gnu.org/archive/html/qemu-devel/2010-03/msg01914.html)
> as breaking DR-DOS Plus.
>
> Reported-by: Roy Tam <address@hidden>
> Signed-off-by: Paolo Bonzini <address@hidden>
> ---
> hw/char/serial.c | 25 ++++++++++++++++---------
> 1 file changed, 16 insertions(+), 9 deletions(-)
>
> diff --git a/hw/char/serial.c b/hw/char/serial.c
> index 0a6747c..5488900 100644
> --- a/hw/char/serial.c
> +++ b/hw/char/serial.c
> @@ -336,10 +336,12 @@ static void serial_ioport_write(void *opaque, hwaddr
> addr, uint64_t val,
> s->divider = (s->divider & 0x00ff) | (val << 8);
> serial_update_parameters(s);
> } else {
> + int changed = (s->ier ^ val) & 0x0f;
uint8_t perhaps?
> s->ier = val & 0x0f;
> /* If the backend device is a real serial port, turn polling of
> the modem
> - status lines on physical port on or off depending on
> UART_IER_MSI state */
> - if (s->poll_msl >= 0) {
> + * status lines on physical port on or off depending on
> UART_IER_MSI state.
> + */
> + if ((changed & UART_IER_MSI) && s->poll_msl >= 0) {
> if (s->ier & UART_IER_MSI) {
> s->poll_msl = 1;
> serial_update_msl(s);
This MSI stuff, this change is just intended to do the same as you're
doing for THRI and making it change based? The commit message and title
doens't mention it.
> @@ -354,18 +356,23 @@ static void serial_ioport_write(void *opaque, hwaddr
> addr, uint64_t val,
> * This is not in the datasheet, but Windows relies on it. It is
> * unclear if THRE has to be resampled every time THRI becomes
> * 1, or only on the rising edge. Bochs does the latter, and
> Windows
> - * always toggles IER to all zeroes and back to all ones. But
> for
> - * now leave it as it has always been in QEMU.
> + * always toggles IER to all zeroes and back to all ones, so do
> the
> + * same.
> *
> * If IER.THRI is zero, thr_ipending is not used. Set it to zero
> * so that the thr_ipending subsection is not migrated.
> */
> - if ((s->ier & UART_IER_THRI) && (s->lsr & UART_LSR_THRE)) {
> - s->thr_ipending = 1;
> - } else {
> - s->thr_ipending = 0;
> + if (changed & UART_IER_THRI) {
> + if ((s->ier & UART_IER_THRI) && (s->lsr & UART_LSR_THRE)) {
> + s->thr_ipending = 1;
> + } else {
> + s->thr_ipending = 0;
> + }
> + }
> +
> + if (changed) {
> + serial_update_irq(s);
> }
> - serial_update_irq(s);
> }
> break;
But the rest of this looks OK.
Dave
> case 2:
> --
> 1.8.3.1
>
--
Dr. David Alan Gilbert / address@hidden / Manchester, UK
- [Qemu-devel] [PATCH v3 0/4] serial fixes, including 2.2->2.1 migration, Paolo Bonzini, 2014/12/12
- [Qemu-devel] [PATCH v3 1/4] serial: reset thri_pending on IER writes with THRI=0, Paolo Bonzini, 2014/12/12
- Re: [Qemu-devel] [PATCH v3 1/4] serial: reset thri_pending on IER writes with THRI=0, Dr. David Alan Gilbert, 2014/12/15
- Re: [Qemu-devel] [PATCH v3 1/4] serial: reset thri_pending on IER writes with THRI=0, Paolo Bonzini, 2014/12/15
- Re: [Qemu-devel] [PATCH v3 1/4] serial: reset thri_pending on IER writes with THRI=0, Dr. David Alan Gilbert, 2014/12/15
- Re: [Qemu-devel] [PATCH v3 1/4] serial: reset thri_pending on IER writes with THRI=0, Paolo Bonzini, 2014/12/15
- Re: [Qemu-devel] [PATCH v3 1/4] serial: reset thri_pending on IER writes with THRI=0, Dr. David Alan Gilbert, 2014/12/15
- Re: [Qemu-devel] [PATCH v3 1/4] serial: reset thri_pending on IER writes with THRI=0, Paolo Bonzini, 2014/12/15
[Qemu-devel] [PATCH v3 4/4] serial: only resample THR interrupt on rising edge of IER.THRI, Paolo Bonzini, 2014/12/12
- Re: [Qemu-devel] [PATCH v3 4/4] serial: only resample THR interrupt on rising edge of IER.THRI,
Dr. David Alan Gilbert <=
[Qemu-devel] [PATCH v3 3/4] serial: update LSR on enabling/disabling FIFOs, Paolo Bonzini, 2014/12/12
[Qemu-devel] [PATCH v3 2/4] serial: clean up THRE/TEMT handling, Paolo Bonzini, 2014/12/12