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[Qemu-devel] [PATCH 03/11] target-arm/translate-a64: Fix wrong mmu_idx u
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 03/11] target-arm/translate-a64: Fix wrong mmu_idx usage for LDT/STT |
Date: |
Fri, 23 Jan 2015 18:20:20 +0000 |
The LDT/STT (load/store unprivileged) instruction decode was using
the wrong MMU index value. This meant that instead of these insns
being "always access as if user-mode regardless of current privilege"
they were "always access as if kernel-mode regardless of current
privilege". This went unnoticed because AArch64 Linux doesn't use
these instructions.
Cc: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
I'm not counting this as a security issue because I'm assuming
nobody treats TCG guests as a security boundary (certainly I
would not recommend doing so...)
---
target-arm/translate-a64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 80d2359..dac2f63 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -2107,7 +2107,7 @@ static void disas_ldst_reg_imm9(DisasContext *s, uint32_t
insn)
}
} else {
TCGv_i64 tcg_rt = cpu_reg(s, rt);
- int memidx = is_unpriv ? 1 : get_mem_index(s);
+ int memidx = is_unpriv ? MMU_USER_IDX : get_mem_index(s);
if (is_store) {
do_gpr_st_memidx(s, tcg_rt, tcg_addr, size, memidx);
--
1.9.1
- Re: [Qemu-devel] [PATCH 05/11] target-arm: Use correct mmu_idx for unprivileged loads and stores, (continued)
[Qemu-devel] [PATCH 11/11] target-arm: Fix brace style in reindented code, Peter Maydell, 2015/01/23
[Qemu-devel] [PATCH 02/11] target-arm: Make arm_current_el() return sensible values for M profile, Peter Maydell, 2015/01/23
[Qemu-devel] [PATCH 03/11] target-arm/translate-a64: Fix wrong mmu_idx usage for LDT/STT,
Peter Maydell <=
[Qemu-devel] [PATCH 06/11] target-arm: Don't define any MMU_MODE*_SUFFIXes, Peter Maydell, 2015/01/23