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Re: [Qemu-devel] [PATCH 05/11] target-arm: Use correct mmu_idx for unpri
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH 05/11] target-arm: Use correct mmu_idx for unprivileged loads and stores |
Date: |
Mon, 26 Jan 2015 14:56:19 +0000 |
On 26 January 2015 at 14:40, Greg Bellows <address@hidden> wrote:
> On Fri, Jan 23, 2015 at 12:20 PM, Peter Maydell <address@hidden>
> wrote:
>>
>> The MMU index to use for unprivileged loads and stores is more
>> complicated than we currently implement:
>> * for A64, it should be "if at EL1, access as if EL0; otherwise
>> access at current EL"
>> * for A32/T32, it should be "if EL2, UNPREDICTABLE; otherwise
>> access as if at EL0".
>>
>
> The wording between the specs appears to be almost identical, curious why
> the handling is different?
Because that's what the ARM ARM specifies. Compare C3.2.5 (A64 LDT &c)
with F7.1.95 (A32/T32 LDRT).
-- PMM
- Re: [Qemu-devel] [PATCH 07/11] target-arm: Split AArch64 cases out of ats_write(), (continued)
[Qemu-devel] [PATCH 04/11] target-arm: Define correct mmu_idx values and pass them in TB flags, Peter Maydell, 2015/01/23
Re: [Qemu-devel] [PATCH 04/11] target-arm: Define correct mmu_idx values and pass them in TB flags, Peter Maydell, 2015/01/27