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[Qemu-devel] [PULL 09/12] target-arm: A64: Fix shifts into sign bit
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 09/12] target-arm: A64: Fix shifts into sign bit |
Date: |
Fri, 13 Feb 2015 05:54:42 +0000 |
Fix attempts to shift into the sign bit of an int, which is undefined
behaviour in C and warned about by the clang sanitizer.
Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden
---
target-arm/translate-a64.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index acf4b16..d3801c5 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -1077,7 +1077,7 @@ static void disas_uncond_b_imm(DisasContext *s, uint32_t
insn)
{
uint64_t addr = s->pc + sextract32(insn, 0, 26) * 4 - 4;
- if (insn & (1 << 31)) {
+ if (insn & (1U << 31)) {
/* C5.6.26 BL Branch with link */
tcg_gen_movi_i64(cpu_reg(s, 30), s->pc);
}
@@ -1271,7 +1271,7 @@ static void gen_get_nzcv(TCGv_i64 tcg_rt)
TCGv_i32 nzcv = tcg_temp_new_i32();
/* build bit 31, N */
- tcg_gen_andi_i32(nzcv, cpu_NF, (1 << 31));
+ tcg_gen_andi_i32(nzcv, cpu_NF, (1U << 31));
/* build bit 30, Z */
tcg_gen_setcondi_i32(TCG_COND_EQ, tmp, cpu_ZF, 0);
tcg_gen_deposit_i32(nzcv, nzcv, tmp, 30, 1);
@@ -1296,7 +1296,7 @@ static void gen_set_nzcv(TCGv_i64 tcg_rt)
tcg_gen_trunc_i64_i32(nzcv, tcg_rt);
/* bit 31, N */
- tcg_gen_andi_i32(cpu_NF, nzcv, (1 << 31));
+ tcg_gen_andi_i32(cpu_NF, nzcv, (1U << 31));
/* bit 30, Z */
tcg_gen_andi_i32(cpu_ZF, nzcv, (1 << 30));
tcg_gen_setcondi_i32(TCG_COND_EQ, cpu_ZF, cpu_ZF, 0);
--
1.9.1
- [Qemu-devel] [PULL 00/12] target-arm queue, Peter Maydell, 2015/02/13
- [Qemu-devel] [PULL 09/12] target-arm: A64: Fix shifts into sign bit,
Peter Maydell <=
- [Qemu-devel] [PULL 11/12] target-arm: A64: Avoid left shifting negative integers in disas_pc_rel_addr, Peter Maydell, 2015/02/13
- [Qemu-devel] [PULL 10/12] target-arm: A64: Fix handling of rotate in logic_imm_decode_wmask, Peter Maydell, 2015/02/13
- [Qemu-devel] [PULL 08/12] target-arm: Add AArch32 guest support to KVM64, Peter Maydell, 2015/02/13
- [Qemu-devel] [PULL 05/12] target-arm: Add CPU property to disable AArch64, Peter Maydell, 2015/02/13
- [Qemu-devel] [PULL 04/12] pci: Move PCI VGA to pci.mak, Peter Maydell, 2015/02/13
- [Qemu-devel] [PULL 01/12] pci: Allocate PCIe host bridge PCI ID, Peter Maydell, 2015/02/13
- [Qemu-devel] [PULL 03/12] arm: Add PCIe host bridge in virt machine, Peter Maydell, 2015/02/13
- [Qemu-devel] [PULL 02/12] pci: Add generic PCIe host bridge, Peter Maydell, 2015/02/13
- [Qemu-devel] [PULL 12/12] target-arm: A64: Avoid signed shifts in disas_ldst_pair(), Peter Maydell, 2015/02/13
- [Qemu-devel] [PULL 06/12] target-arm: Add feature parsing to virt, Peter Maydell, 2015/02/13