Re: [Qemu-devel] [PATCH v2 0/6] TriCore: Add RRR1 and RRR2 instructions

[Richard Henderson]

On 02/11/2015 08:48 AM, Bastian Koppelmann wrote:
> Bastian Koppelmann (6):
>   target-tricore: Fix RLC_ADDI, RLC_ADDIH using wrong microcode helper
>   target-tricore: fix msub32_suov return wrong results
>   target-tricore: Add instructions of RRR2 opcode format
>   target-tricore: Add instructions of RRR1 opcode format, which have
>     0x83 as first opcode
>   target-tricore: Add instructions of RRR1 opcode format, which have
>     0x43 as first opcode
>   target-tricore: Add instructions of RRR1 opcode format, which have
>     0xc3 as first opcode
> 
>  target-tricore/helper.h          |    9 +
>  target-tricore/op_helper.c       |  374 +++++++++-
>  target-tricore/translate.c       | 1391 
> ++++++++++++++++++++++++++++++++++++--
>  target-tricore/tricore-opcodes.h |   10 +-
>  4 files changed, 1728 insertions(+), 56 deletions(-)

Reviewed-by: Richard Henderson <address@hidden>


r~