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[Qemu-devel] [PATCH v2 0/2] target-mips: Add support for misaligned acce
[Qemu-devel] [PATCH v2 0/2] target-mips: Add support for misaligned accesses
Mon, 11 May 2015 12:30:48 +0100
This patch set adds support for misaligned memory accesses in MIPS architecture
Release 6 and MIPS SIMD Architecture.
The behaviour, semantics, and architecture specifications of misaligned memory
accesses are described in:
MIPS Architecture For Programmers Volume I-A: Introduction to the MIPS64
Architecture, Appendix B Misaligned Memory Accesses.
Available at http://www.imgtec.com/mips/architectures/mips64.asp
* Removed re-translation in the mips_cpu_do_unaligned_access() (Peter)
* Checks validity only if an access is spanning into two pages in MSA (Leon)
* Introduced misaligned flag to indicate MSA ld/st is ongoing, is used to
allow misaligned accesses in the mips_cpu_do_unaligned_access() callback.
This is crucial to support MSA misaligned accesses in Release 5 cores.
Yongbok Kim (2):
target-mips: Misaligned memory accesses for R6
target-mips: Misaligned memory accesses for MSA
target-mips/cpu.h | 5 +++
target-mips/helper.c | 33 ++++++++++++++++++
target-mips/op_helper.c | 74 ++++++++++++++++++++++++++++++++---------
target-mips/translate.c | 4 ++
target-mips/translate_init.c | 2 +-
5 files changed, 100 insertions(+), 18 deletions(-)
- [Qemu-devel] [PATCH v2 0/2] target-mips: Add support for misaligned accesses,
Yongbok Kim <=