[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 4/5] target-tricore: fix rslcx restoring the upper co
From: |
Bastian Koppelmann |
Subject: |
[Qemu-devel] [PULL 4/5] target-tricore: fix rslcx restoring the upper context instead of the lower |
Date: |
Mon, 11 May 2015 14:30:15 +0200 |
Signed-off-by: Bastian Koppelmann <address@hidden>
---
Note here, that I swaped the attributes here as compared to the patch on the
list, since this was wrong.
target-tricore/op_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-tricore/op_helper.c b/target-tricore/op_helper.c
index 9907e07..1dc25c2 100644
--- a/target-tricore/op_helper.c
+++ b/target-tricore/op_helper.c
@@ -2581,7 +2581,7 @@ void helper_rslcx(CPUTriCoreState *env)
((env->PCXI & MASK_PCXI_PCXO) << 6);
/* {new_PCXI, A[11], A[10], A[11], D[8], D[9], D[10], D[11], A[12],
A[13], A[14], A[15], D[12], D[13], D[14], D[15]} = M(EA, 16 * word); */
- restore_context_upper(env, ea, &new_PCXI, &env->gpr_a[11]);
+ restore_context_lower(env, ea, &env->gpr_a[11], &new_PCXI);
/* M(EA, word) = FCX; */
cpu_stl_data(env, ea, env->FCX);
/* M(EA, word) = FCX; */
--
2.4.0
- [Qemu-devel] [PULL 0/5] tricore-patches, Bastian Koppelmann, 2015/05/11
- [Qemu-devel] [PULL 2/5] target-tricore: fix SLR_LD_W and SLR_LD_W_POSTINC insn being a 2 byte memory access insted of 4, Bastian Koppelmann, 2015/05/11
- [Qemu-devel] [PULL 3/5] target-tricore: fix BO_OFF10_SEXT calculating the wrong offset, Bastian Koppelmann, 2015/05/11
- [Qemu-devel] [PULL 1/5] target-tricore: Fix LOOP using wrong register for compare, Bastian Koppelmann, 2015/05/11
- [Qemu-devel] [PULL 4/5] target-tricore: fix rslcx restoring the upper context instead of the lower,
Bastian Koppelmann <=
- [Qemu-devel] [PULL 5/5] target-tricore: fix rfe not restoring the PC, Bastian Koppelmann, 2015/05/11
- Re: [Qemu-devel] [PULL 0/5] tricore-patches, Peter Maydell, 2015/05/11