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Re: [Qemu-devel] [PATCH v2] target-s390x: fix LOAD MULTIPLE instruction
From: |
Aurelien Jarno |
Subject: |
Re: [Qemu-devel] [PATCH v2] target-s390x: fix LOAD MULTIPLE instruction on page boundary |
Date: |
Wed, 27 May 2015 00:10:32 +0200 |
User-agent: |
Mutt/1.5.23 (2014-03-12) |
On 2015-05-26 23:43, Alexander Graf wrote:
>
>
> On 26.05.15 18:15, Richard Henderson wrote:
> > On 05/26/2015 02:09 AM, Aurelien Jarno wrote:
> >> This is an important detail in case the base register is in the list
> >> of registers to be loaded. If a page fault occurs this register might be
> >> overwritten and when the instruction is later restarted the wrong
> >> base register value is useD.
> >>
> >> Fix this by first loading the first and last value from memory, hence
> >> triggering all possible page faults, and then the remaining registers.
> >>
> >> This fixes random segmentation faults seen in the guest.
> >>
> >> Cc: Alexander Graf <address@hidden>
> >> Cc: Richard Henderson <address@hidden>
> >> Signed-off-by: Aurelien Jarno <address@hidden>
> >> ---
> >> target-s390x/translate.c | 128
> >> ++++++++++++++++++++++++++++++++++++-----------
> >> 1 file changed, 99 insertions(+), 29 deletions(-)
> >>
> >> Changes v1->v2:
> >> - Do the load in two steps: first and last registers, and then the
> >> remaining ones
> >
> > Reviewed-by: Richard Henderson <address@hidden>
>
> Thanks, applied to s390-next.
>
> So what do we do about the other patch set?
For the other patch set, it seems the best to ignore the STFL/STFLE
part. Patches 01 to 05 and 09 to 10 are still valid, they are just a
collection of bug fixes and improvement not specially linked together.
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
address@hidden http://www.aurel32.net