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Re: [Qemu-devel] [PATCH v2 13/23] target-i386: create a separate Address
From: |
Laszlo Ersek |
Subject: |
Re: [Qemu-devel] [PATCH v2 13/23] target-i386: create a separate AddressSpace for each CPU |
Date: |
Thu, 04 Jun 2015 14:48:10 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 |
On 06/04/15 10:02, Paolo Bonzini wrote:
>
>
> On 03/06/2015 19:58, Peter Crosthwaite wrote:
>> On Wed, Jun 3, 2015 at 10:08 AM, Paolo Bonzini <address@hidden> wrote:
>>> Different CPUs can be in SMM or not at the same time, thus they
>>> will see different things where the chipset places SMRAM.
>>>
>>> Signed-off-by: Paolo Bonzini <address@hidden>
>>> ---
>>> target-i386/cpu-qom.h | 1 +
>>> target-i386/cpu.c | 14 ++++++++++++++
>>> 2 files changed, 15 insertions(+)
>>>
>>> diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h
>>> index 31a0c1e..39cd878 100644
>>> --- a/target-i386/cpu-qom.h
>>> +++ b/target-i386/cpu-qom.h
>>> @@ -111,6 +111,7 @@ typedef struct X86CPU {
>>> /* in order to simplify APIC support, we leave this pointer to the
>>> user */
>>> struct DeviceState *apic_state;
>>> + struct MemoryRegion *cpu_as_root;
>>> } X86CPU;
>>>
>>> static inline X86CPU *x86_env_get_cpu(CPUX86State *env)
>>> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
>>> index 523d0cd..23b57a9 100644
>>> --- a/target-i386/cpu.c
>>> +++ b/target-i386/cpu.c
>>> @@ -44,6 +44,7 @@
>>> #include "hw/qdev-properties.h"
>>> #include "hw/cpu/icc_bus.h"
>>> #ifndef CONFIG_USER_ONLY
>>> +#include "exec/address-spaces.h"
>>> #include "hw/xen/xen.h"
>>> #include "hw/i386/apic_internal.h"
>>> #endif
>>> @@ -2811,6 +2812,18 @@ static void x86_cpu_realizefn(DeviceState *dev,
>>> Error **errp)
>>> #endif
>>>
>>> mce_init(cpu);
>>> +
>>> +#ifndef CONFIG_USER_ONLY
>>> + if (tcg_enabled()) {
>>> + cpu->cpu_as_root = g_new(MemoryRegion, 1);
>>> + cs->as = g_new(AddressSpace, 1);
>>> + memory_region_init_alias(cpu->cpu_as_root, OBJECT(cpu), "memory",
>>> + get_system_memory(), 0, ~0ull);
>>> + memory_region_set_enabled(cpu->cpu_as_root, true);
>>> + address_space_init(cs->as, cpu->cpu_as_root, "CPU");
>>> + }
>>> +#endif
>>> +
>>> qemu_init_vcpu(cs);
>>>
>>> /* Only Intel CPUs support hyperthreading. Even though QEMU fixes this
>>> @@ -2834,6 +2847,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error
>>> **errp)
>>> cpu_reset(cs);
>>>
>>> xcc->parent_realize(dev, &local_err);
>>> +
>>
>> This intentional?
>
> It's a remnant from a previous version, but I do prefer having a blank
> line before the error recovery part of a function.
(+1. In fact if it's a cascade of several labels, I might insert a blank
line before each label.)
Laszlo
>
> Paolo
>
>> Regards,
>> Peter
>>
>>> out:
>>> if (local_err != NULL) {
>>> error_propagate(errp, local_err);
>>> --
>>> 2.4.1
>>>
>>>
>>>
- [Qemu-devel] [PATCH v2 09/23] pflash_cfi01: add secure property, (continued)
- [Qemu-devel] [PATCH v2 09/23] pflash_cfi01: add secure property, Paolo Bonzini, 2015/06/03
- [Qemu-devel] [PATCH v2 10/23] vl: allow full-blown QemuOpts syntax for -global, Paolo Bonzini, 2015/06/03
- [Qemu-devel] [PATCH v2 11/23] qom: add object_property_add_const_link, Paolo Bonzini, 2015/06/03
- [Qemu-devel] [PATCH v2 12/23] vl: run "late" notifiers immediately, Paolo Bonzini, 2015/06/03
- [Qemu-devel] [PATCH v2 13/23] target-i386: create a separate AddressSpace for each CPU, Paolo Bonzini, 2015/06/03
- [Qemu-devel] [PATCH v2 14/23] hw/i386: add a separate region that tracks the SMRAME bit, Paolo Bonzini, 2015/06/03
- [Qemu-devel] [PATCH v2 16/23] hw/i386: remove smram_update, Paolo Bonzini, 2015/06/03
- [Qemu-devel] [PATCH v2 15/23] target-i386: use memory API to implement SMRAM, Paolo Bonzini, 2015/06/03
- [Qemu-devel] [PATCH v2 17/23] q35: implement high SMRAM, Paolo Bonzini, 2015/06/03
- [Qemu-devel] [PATCH v2 18/23] q35: fix ESMRAMC default, Paolo Bonzini, 2015/06/03
- [Qemu-devel] [PATCH v2 20/23] q35: implement SMRAM.D_LCK, Paolo Bonzini, 2015/06/03