qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH 3/5] arm: Support thumb in set_pc routines


From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH 3/5] arm: Support thumb in set_pc routines
Date: Mon, 15 Jun 2015 08:36:44 +0100

On 15 June 2015 at 04:48, Peter Crosthwaite <address@hidden> wrote:
> ARM program counters are always at least 16b aligned with the LSB
> being only used the indicate thumb mode in exchange situations. Mask
> this bit off in set_pc to ignore the exchange semantic (which must
> still be managed by the caller).
>
> Signed-off-by: Peter Crosthwaite <address@hidden>
> ---
> ---
>  target-arm/cpu.c   | 2 +-
>  target-arm/cpu64.c | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target-arm/cpu.c b/target-arm/cpu.c
> index 6181f28..5bb08a6 100644
> --- a/target-arm/cpu.c
> +++ b/target-arm/cpu.c
> @@ -35,7 +35,7 @@ static void arm_cpu_set_pc(CPUState *cs, vaddr value)
>  {
>      ARMCPU *cpu = ARM_CPU(cs);
>
> -    cpu->env.regs[15] = value;
> +    cpu->env.regs[15] = value & 0xfffffffe;
>  }


This doesn't look right to me. There are two semantics that
make sense for setting an ARM PC value:

 (1) interworking-aware, where we set the Thumb bit from the
LS bit and r15 from everything else
 (2) interworking-unaware, where we just set r15 (and it's
the caller's job to not pass us a misaligned value)

This seems to be an odd mix of both.

-- PMM



reply via email to

[Prev in Thread] Current Thread [Next in Thread]